upd78f0124hgba1-8et-a Renesas Electronics Corporation., upd78f0124hgba1-8et-a Datasheet - Page 491

no-image

upd78f0124hgba1-8et-a

Manufacturer Part Number
upd78f0124hgba1-8et-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
Serial
interface
UART0
Serial
interface
UART6
Function
BRGC0: Baud
rate generator
control register
0
POWER0,
TXE0, RXE0:
Bits 7, 6, and 5
of ASIM0
UART mode
UART
transmission
UART reception
Baud rate error
Allowable baud
rate range
during reception
UART mode
TXB6: Transmit
buffer register 6
Details of
Function
Make sure that bit 6 (TXE0) and bit 5 (RXE0) of the ASIM0 register = 0 when
rewriting the MDL04 to MDL00 bits.
The baud rate value is the output clock of the 5-bit counter divided by 2.
Clear POWER0 to 0 after clearing TXE0 and RXE0 to 0 to set the operation stop
mode.
To start the operation, set POWER0 to 1, and then set TXE0 and RXE0 to 1.
Take relationship with the other party of communication when setting the port
mode register and port register.
After transmit data is written to TXS0, do not write the next transmit data before
the transmission completion interrupt signal (INTST0) is generated.
Be sure to read receive buffer register 0 (RXB0) even if a reception error occurs.
Otherwise, an overrun error will occur when the next data is received, and the
reception error status will persist.
Reception is always performed with the “number of stop bits = 1”. The second
stop bit is ignored.
Be sure to read asynchronous serial interface reception error status register 0
(ASIS0) before reading RXB0.
Keep the baud rate error during transmission to within the permissible error range
at the reception destination.
Make sure that the baud rate error during reception satisfies the range shown in
(4) Permissible baud rate range during reception.
Make sure that the baud rate error during reception is within the permissible error
range, by using the calculation expression shown below.
The TxD6 output inversion function inverts only the transmission side and not the
reception side. To use this function, the reception side must be ready for
reception of inverted data.
If clock supply to serial interface UART6 is not stopped (e.g., in the HALT mode),
normal operation continues. If clock supply to serial interface UART6 is stopped
(e.g., in the STOP mode), each register stops operating, and holds the value
immediately before clock supply was stopped. The TxD6 pin also holds the value
immediately before clock supply was stopped and outputs it. However, the
operation is not guaranteed after clock supply is resumed. Therefore, reset the
circuit so that POWER6 = 0, RXE6 = 0, and TXE6 = 0.
If data is continuously transmitted, the communication timing from the stop bit to
the next start bit is extended two operating clocks of the macro. However, this
does not affect the result of communication because the reception side initializes
the timing when it has detected a start bit. Do not use the continuous
transmission function if UART6 is used in the LIN communication operation.
Do not write data to TXB6 when bit 1 (TXBF6) of asynchronous serial interface
transmission status register 6 (ASIF6) is 1.
Do not refresh (write the same value to) TXB6 by software during a
communication operation (when bit 7 (POWER6) and bit 6 (TXE6) of
asynchronous serial interface operation mode register 6 (ASIM6) are 1 or when
bit 7 (POWER6) and bit 5 (RXE6) of ASIM6 are 1).
APPENDIX D LIST OF CAUTIONS
User’s Manual U16962EJ3V0UD
Cautions
p. 255
p. 255
p. 256
p. 257
p. 260
p. 261
p. 261
p. 261
p. 264
p. 264
p. 266
p. 268
p. 268
p. 268
p. 274
p. 274
Page
(15/23)
491

Related parts for upd78f0124hgba1-8et-a