upd78f0124hgba1-8et-a Renesas Electronics Corporation., upd78f0124hgba1-8et-a Datasheet - Page 461

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upd78f0124hgba1-8et-a

Manufacturer Part Number
upd78f0124hgba1-8et-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
31.2 Peripheral Hardware That Generates Wait
clocks.
Note No wait cycle is generated for the CPU if the number of wait clocks calculated by the above expression is 1.
Caution When the CPU is operating on the subsystem clock and the high-speed system clock is stopped
Remark The clock is the CPU clock (f
Watchdog timer
Serial interface UART0
Serial interface UART6
A/D converter
Table 31-1 lists the registers that issue a wait request when accessed by the CPU, and the number of CPU wait
Peripheral Hardware
(MCC = 1), do not access the registers listed above using an access method in which a wait request
is issued.
Table 31-1. Registers That Generate Wait and Number of CPU Wait Clocks
* The result after the decimal point is truncated if it is less than t
WDTM
ASIS0
ASIS6
ADM
ADS
PFM
PFT
ADCR
<Calculating maximum number of wait clocks>
{(1/f
(1/f
f
f
t
MACRO
CPU
CPUL
MACRO
CPU
:
:
:
), and is rounded up if it exceeds t
Register
) × 2/(1/f
Macro operating frequency
(When bit 5 (FR2) of ADM = “1”: f
CPU clock frequency
Low-level width of CPU clock
CPU
CHAPTER 31 CAUTIONS FOR WAIT
).
CPU
User’s Manual U16962EJ3V0UD
)} + 1
Write
Read
Read
Write
Write
Write
Write
Read
Access
CPUL
X
/2, when bit 5 (FR2) of ADM = “0”: f
.
3 clocks (fixed)
1 clock (fixed)
1 clock (fixed)
2 to 5 clocks
(when ADM.5 flag = “1”)
2 to 9 clocks
(when ADM.5 flag = “0”)
1 to 5 clocks
(when ADM.5 flag = “1”)
1 to 9 clocks
(when ADM.5 flag = “0”)
CPUL
Number of Wait Clocks
after it has been multiplied by
Note
Note
X
/2
2
)
461

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