upd78f0124hgba1-8et-a Renesas Electronics Corporation., upd78f0124hgba1-8et-a Datasheet - Page 270

• Manufacturer Part Number: upd78f0124hgba1-8et-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

(INTP0). The length of the synchronous field transmitted from the LIN master can be measured using the external
event capture operation of 16-bit timer/event counter 00, and the baud rate error can be calculated.
timer/event counter 00 by port input switch control (ISC0/ISC1), without connecting RxD6 and INTP0/TI000 externally.
270
Reception interrupt
Notes 1.
To perform a LIN receive operation, use a configuration like the one shown in Figure 14-3.
The wakeup signal transmitted from the LIN master is received by detecting the edge of the external interrupt
The input source of the reception port input (RxD6) can be input to the external interrupt (INTP0) and 16-bit
Edge detection
Capture timer
(INTSR6)
(INTP0)
2.
3.
4.
5.
Sleep
RX6
bus
The wakeup signal is detected at the edge of the pin, and enables UART6 and sets the SBF reception
mode.
Reception continues until the STOP bit is detected. When an SBF with low-level data of 11 bits or
more has been detected, it is assumed that SBF reception has been completed correctly, and an
interrupt signal is output. If an SBF with low-level data of less than 11 bits has been detected, it is
assumed that an SBF reception error has occurred. The interrupt signal is not output and the SBF
reception mode is restored.
If SBF reception has been completed correctly, an interrupt signal is output. This SBF reception
completion interrupt enables the capture timer.
suppressed, and error detection processing of UART communication and data transfer of the shift
register and RXB6 is not performed. The shift register holds the reset value FFH.
Calculate the baud rate error from the bit length of the synchronous field, disable UART6 after SF
reception, and then re-set baud rate generator control register 6 (BRGC6).
Distinguish the checksum field by software. Also perform processing by software to initialize UART6
after reception of the checksum field and to set the SBF reception mode again.
Note 1
Disable
signal frame
Wakeup
Enable
CHAPTER 14 SERIAL INTERFACE UART6
Figure 14-2. LIN Reception Operation
Disable
Synchronous
13 bits
break field
reception
User’s Manual U16962EJ3V0UD
SBF
Note 2
Note 3
Synchronous
reception
field
SF
Enable
Note 4
Detection of errors OVE6, PE6, and FE6 is
reception
Identifier
field
ID
Data field
reception
Data
Data field Checksum
reception
Data
reception
field
Data
Note 5