upd78f0124hgba1-8et-a Renesas Electronics Corporation., upd78f0124hgba1-8et-a Datasheet - Page 366

• Manufacturer Part Number: upd78f0124hgba1-8et-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

automatically starts at the end of the high-speed system clock oscillation stabilization time. Monitoring is stopped in
STOP mode and during the oscillation stabilization time.
speed system clock is stopped, monitoring automatically starts at the end of the high-speed system clock oscillation
stabilization time. Monitoring is stopped when oscillation of the high-speed system clock is stopped and during the
oscillation stabilization time.
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Internal oscillation clock
When bit 0 (CLME) of the clock monitor mode register (CLM) is set to 1 before entering STOP mode, monitoring
When bit 0 (CLME) of the clock monitor mode register (CLM) is set to 1 before or while oscillation of the high-
Note The register that controls oscillation of the high-speed system clock differs depending on the type of the
(CLME = 1 is set when CPU clock operates on internal oscillation clock and before entering STOP mode)
Internal oscillation clock
Clock monitor status
Clock monitor status
clock supplied to the CPU.
(6) Clock monitor status after high-speed system clock oscillation is stopped by software
CPU operation
CPU operation
• When CPU operates on internal oscillation clock: Controlled by bit 7 (MSTOP) of the main OSC control
• When CPU operates on subsystem clock:
system clock
system clock
(CPU clock)
High-speed
High-speed
MSTOP or
MCC
CLME
CLME
Note
operation
Monitoring
Normal
Monitoring
(5) Clock monitor status after STOP mode is released
Figure 20-3. Timing of Clock Monitor (3/4)
Oscillation
Monitoring
Monitoring
Oscillation
stopped
stopped
stopped
stopped
Normal operation (internal oscillation clock or subsystem clock
STOP
CHAPTER 20 CLOCK MONITOR
User’s Manual U16962EJ3V0UD
Oscillation stabilization time
(time set by OSTS register)
Oscillation stabilization time
(time set by OSTS register)
Monitoring stopped
Clock supply
Monitoring stopped
17 clocks
stopped
register (MOC)
Controlled by bit 7 (MCC) of the processor clock
control register (PCC)
Normal operation
Monitoring
Note
)
Monitoring