upd78f0124hgba1-8et-a Renesas Electronics Corporation., upd78f0124hgba1-8et-a Datasheet - Page 436

no-image

upd78f0124hgba1-8et-a

Manufacturer Part Number
upd78f0124hgba1-8et-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
(2) Serial interface
Note C is the load capacitance of the SCK10 and SO10 output lines.
Note C is the load capacitance of the SO10 output line.
436
Transfer rate
Transfer rate
SCK10 cycle time
SCK10 high-/low-level width
SI10 setup time (to SCK10↑)
SI10 hold time (from SCK10↑)
Delay time from SCK10↓ to
SO10 output
SCK10 cycle time
SCK10 high-/low-level width
SI10 setup time (to SCK10↑)
SI10 hold time (from SCK10↑)
Delay time from SCK10↓ to
SO10 output
(T
(a) UART mode (UART6, dedicated baud rate generator output)
(b) UART mode (UART0, dedicated baud rate generator output)
(c) 3-wire serial I/O mode (master mode, SCK10... internal clock output)
(d) 3-wire serial I/O mode (slave mode, SCK10... external clock input)
A
= −40 to +85°C, 2.5 V ≤ V
CHAPTER 27 ELECTRICAL SPECIFICATIONS (STANDARD PRODUCTS, (A) GRADE PRODUCTS)
Parameter
Parameter
Parameter
Parameter
DD
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
Symbol
KCY1
KH1
KL1
SIK1
KSI1
KSO1
KCY2
KH2
KL2
SIK2
KSI2
KSO2
Symbol
Symbol
= EV
,
,
DD
4.0 V ≤ V
3.3 V ≤ V
2.7 V ≤ V
2.5 V ≤ V
2.7 V ≤ V
2.5 V ≤ V
2.7 V ≤ V
2.5 V ≤ V
2.7 V ≤ V
2.5 V ≤ V
C = 100 pF
Note
2.7 V ≤ V
2.5 V ≤ V
C = 100 pF
≤ 5.5 V, 2.5 V ≤ AV
User’s Manual U16962EJ3V0UD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
DD
Note
≤ 5.5 V
< 4.0 V
< 3.3 V
< 2.7 V
≤ 5.5 V
< 2.7 V
≤ 5.5 V
< 2.7 V
≤ 5.5 V
< 2.7 V
≤ 5.5 V
< 2.7 V
Conditions
Conditions
Conditions
Conditions
2.7 V ≤ V
2.5 V ≤ V
REF
DD
DD
≤ 5.5 V
< 2.7 V
≤ V
DD
, V
SS
t
t
KCY1
KCY1
t
= EV
MIN.
MIN.
MIN.
MIN.
KCY2
200
240
400
800
400
800
30
70
30
70
80
50
/2−10
/2−50
/2
SS
= AV
TYP.
TYP.
TYP.
TYP.
SS
= 0 V)
312.5
312.5
MAX.
MAX.
MAX.
MAX.
120
120
30
kbps
kbps
Unit
Unit
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

Related parts for upd78f0124hgba1-8et-a