upd78f0124hgba1-8et-a Renesas Electronics Corporation., upd78f0124hgba1-8et-a Datasheet - Page 100
upd78f0124hgba1-8et-a
Manufacturer Part Number
upd78f0124hgba1-8et-a
Description
8-bit Single-chip Microcontrollers
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.UPD78F0124HGBA1-8ET-A.pdf
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(3) Main clock mode register (MCM)
100
This register sets the CPU clock (high-speed system clock/internal oscillation clock).
MCM can be set by a 1-bit or 8-bit memory manipulation instruction.
RESET input clears this register to 00H.
Address: FFA1H
Symbol
MCM
Note Bit 1 is read-only.
Cautions 1. When internal oscillation clock is selected as the clock to be supplied to the
MCM0
MCS
7
0
0
1
0
1
After reset: 00H
2. Set MCS = 1 and MCM0 = 1 before switching subsystem clock operation to high-
Figure 5-4. Format of Main Clock Mode Register (MCM)
Operates with internal oscillation clock
Operates with high-speed system clock
Internal oscillation clock
High-speed system clock
CPU, the divided clock of the internal oscillator output (f
peripheral hardware (f
Operation of the peripheral hardware with internal oscillation clock cannot be
guaranteed. Therefore, when internal oscillation clock is selected as the clock
supplied to the CPU, do not use peripheral hardware. In addition, stop the
peripheral hardware before switching the clock supplied to the CPU from the
high-speed system clock to the internal oscillation clock. Note, however, that
the following peripheral hardware can be used when the CPU operates on the
internal oscillation clock.
• Watchdog timer
• Clock monitor
• 8-bit timer H1 when f
• Peripheral hardware selecting external clock as the clock source
speed system clock operation (bit 4 (CSS) of the processor clock control
register (PCC) is changed from 1 to 0).
(Except when external count clock of TM00 is selected (TI000 valid edge))
6
0
R/W
CHAPTER 5 CLOCK GENERATOR
Note
User’s Manual U16962EJ3V0UD
5
0
X
R
Selection of clock supplied to CPU
= 240 kHz (TYP.)).
/2
4
0
7
is selected as count clock
CPU clock status
3
0
2
0
MCS
<1>
X
) is supplied to the
MCM0
<0>
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