MSC8101PG Motorola / Freescale Semiconductor, MSC8101PG Datasheet - Page 81
MSC8101PG
Manufacturer Part Number
MSC8101PG
Description
MSC8101PG 16-Bit Digital Signal Processor Quick Reference
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
1.MSC8101PG.pdf
(162 pages)
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SYPCR
SWSR
Note: 1.
16–23 PARTNUM
24–31 MASKNUM
16–23 BMT
Reset
Reset
0–14 ISB
0–15 SWTC
Bits
Bits
24
25
29
30
31
Bit
Bit
PBME
LBME
SWE
SWRI
SWP
16
0
1
1
To prevent SWT time-out , write 0x556C followed by 0xAA39.
Name
Name
Software Service Register
System Protection Control Register
17
1
1
1
Internal Space Base
Part Number
Mask Number
Software Watchdog Timer Count
Bus Monitor Timing
PowerPC 60x Bus Monitor Enable
PowerPC Local Bus Monitor Enable
Software Watchdog Enable
Software Watchdog Reset/Interrupt Select
Software Watchdog Prescale
18
2
1
1
19
3
1
1
BMT
Description
Description
20
4
1
1
Table 6-8. SIU Registers (Continued)
21
5
1
1
SYPCR Bit Descriptions
22
6
1
1
IMMR Bit Descriptions
23
7
1
1
SWTC
Configured at reset to one of seven addresses. See the MSC8101
Reference Manual chapters on memory maps and reset for details.
Mask-programmed to 0x50: code corresponds to part number.
Mask-programmed to 0x00: code corresponds to mask number
Contains the count value for the software watchdog timer (SWT)
Defines the time-out period for the bus monitor. Granularity: 8 bus clocks
0 = Disabled
0 = Disabled
0 = Disabled
0 = SWT and bus monitor time-out cause machine check interrupt to core
1 = Same conditions cause a hard reset
0 = SWT clock not prescaled
PBME
24
8
1
0
LBME
25
9
1
0
10
26
1
0
11
27
—
1
0
Settings
Settings
1 = SWT clock prescaled
1 = Enabled
1 = Enabled
1 = Enabled
12
28
Type: R/W
1
0
Type: W
SWE
13
29
1
1
SWRI
14
30
1
1
0x1000E
0x10004
SWP
15
31
1
1
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