MSC8101PG Motorola / Freescale Semiconductor, MSC8101PG Datasheet - Page 101

• Manufacturer Part Number: MSC8101PG
• Description: MSC8101PG 16-Bit Digital Signal Processor Quick Reference
• Manufacturer: Motorola / Freescale Semiconductor

10–15 NBD
22–24 TSZ
Bits
5–6
26
27
29
31
0
1
2
4
9
INTRPT
CYC
CONT
NO_INC
BP
NBUS
FLS
RD
TC
GBL
Name
Interrupt
Cyclic Address
Continuous Buffer Mode
Increments Address
Bus Priority (arbitrate for bus mastership)
Next Bus
Next Buffer
Transfer Size (maximum transaction size)
Flush FIFO
Read Channel
Transfer Code
Global Transaction
Description
Table 6-13. DMA Registers (Continued)
BD_ATTR Bit Descriptions
0 = Do not issue interrupt
1 = Issue interrupt when size reaches zero
0 = Sequential address; 1 = Cyclic address
0 = Buffer closed when BD_SIZE = 0
1 = Buffer continues to operate
0 = Increment address after request is serviced
1 = Do not increment
00 = Request 1010
01 = Request 1011
0 = PowerPC Local bus
Points the next buffer to call when size reaches zero and CONT is set
001 = 8 bits
010 = 16 bits
011 = 32 bits
000 = 64 bits
0 = Do not flush.
0 = Write transaction.
0 = TC[0–2] value is 100.
0 = Non-global transaction.
Settings
10 = Request 1100
11 = Reserved
1 = PowerPC 60x bus
100 = One burst
101 = Reserved
11x = Reserved
1 = Flush.
1 = Read transaction.
1 = TC[0–2] value is 101.
1 = Global transaction.