MSC8101PG Motorola / Freescale Semiconductor, MSC8101PG Datasheet - Page 35

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MSC8101PG

Manufacturer Part Number
MSC8101PG
Description
MSC8101PG 16-Bit Digital Signal Processor Quick Reference
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
Notes:
PB31
PB30
PB29
PB28
PB27
PB26
PB25
PB24
PA8
PA7
PA6
Pin
Pin
PDIRA[x] = 1 (Output)
1. MSNUM[0–4] is the sub-block code of the peripheral controller using SDMA; MSNUM[5] indicates which
2. x = The port signal number.
MII/HDLC nibble
MII/HDLC nibble
FCC2: TX_ER
PDIRB[x] = 1
FCC2: TxD3
FCC2: TxD2
FCC2: RTS
SCC2: TxD
section, transmit or receive, is active during the transfer. See the SDMA Programming Model information in
the MSC8101 Reference Manual.
(Output)
MII
Table 3-3. Port A—Dedicated Pin Assignment (PPARA = 1) (Continued)
Table 3-4. Port B Dedicated Pin Assignment (PPARB = 1)
PSORA[x] = 0
PSORB[x] = 0
TDM_A1: L1RXD3
MSC8101 Programmer’s Quick Reference
SMC2: SMRXD
SMC2: SMSYN
FCC2: RX_DV
FCC2: RX_ER
PDIRA[x] = 0
PDIRB[x] = 0
FCC2: CRS
SCC2: RxD
FCC2: COL
(Input)
(Input)
nibble
MII
MII
MII
MII
Default
Pin Function
Input
Default
Pin Function
GND
GND
Input
GND
GND
GND
GND
GND
GND
GND
1.
TDM_A1: L1TXD3
PDIRA[x] = 1
FCC2: TX_EN
PDIRB[x] = 1
SCC2: TENA
SCC2: RTS
(Output)
(Output)
Ethernet
nibble
MII
Dedicated Pin Assignments by Port
PSORA[x] = 1
PSORB[x] = 1
TDM_A1: L1RSYNC
(Input Unless Inout
PDIRB[x] = 0 (Input
TDM_B2: L1RSYNC
TDM_C2: L1RSYNC
TDM_A1: L1RXD0
L1TSYNC/GRANT
TDM_A1: L1RXD
L1TSYNC/GRANT
L1TSYNC/GRANT
TDM_C2: L1RXD
TDM_B2: L1RXD
TDM_C2: L1TXD
TDM_B2: L1TXD
Unless Inout Is
PDIRA[x] = 0
Is Specified)
Inout, nibble
Inout, serial
TDM_A1:
Specified)
TDM_B2:
TDM_C2:
Inout
Inout
Inout
Inout
Default
Default
Input
Input
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
27

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