MSC8101PG Motorola / Freescale Semiconductor, MSC8101PG Datasheet - Page 155
![no-image](/images/no-image-200.jpg)
MSC8101PG
Manufacturer Part Number
MSC8101PG
Description
MSC8101PG 16-Bit Digital Signal Processor Quick Reference
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
1.MSC8101PG.pdf
(162 pages)
- Current page: 155 of 162
- Download datasheet (2Mb)
VSL
WAIT
ZXT.x
ZXTA.x
Mnemomic
Viterbi shift left: specialized move to support Viterbi kernel
If VF2 == 1, then (D3.L
If VF0 == 1, then (D3.L
If VF3 == 1, then (D3.H
If VF1 == 1, then (D3.H
If VF2 == 1, then (D3.L
If VF0 == 1, then (D3.L
If VF3 == 1, then (D3.H
If VF1 == 1, then (D3.H
Wait for interrupt (low power stand-by)
Disable clocks to the processor core and enter the
WAIT processing state
Zero extend
Da[7:0]
Da[15:0]
0
Zero extend
Dn[39:32]
Dn[7:0]; 0
else (D1.L
Dn[15:0]; 0
else (D1.L
else (D1.H
else (D1.H
else (D1.L
else (D1.H
else (D1.H
else (D1.L
Operation
Dn[39:8]
1)
D2.L
D6.L
D2.H
D6.H
Dn[39:16]
1)
1)
1 + 1)
1)
1 + 1)
1)
1 + 1)
1)
1 + 1)
1 + 1)
1 + 1)
1)
1 + 1)
1)
1 + 1)
(word 0)
Table 9-5. Instructions Grouped Alphabetically (Continued)
(word 2)
(word 2)
(word 0)
(word 2)
(word 0)
(word 2)
(word 0)
(word 0)
(word 1)
(word 0)
(word 1)
(word 1)
(word 3)
(word 1)
(word 1)
(word 3)
(word 3)
(word 1)
(word 3)
Description
VSL.4W D2:D6:D1:D3, (Rn)+N0
VSL.4F D2:D6:D1:D3, (Rn)+N0
VSL.2W D1:D3, (Rn)+N0
VSL.2F D1:D3, (Rn)+N0
WAIT
ZXT.B Da,Dn
ZXT.W Da,Dn
ZXT.L Dn
Assembler Syntax
Words
1
1
1
1
1
1
1
1
Cycles
1
1
1
1
8
1
1
1
Type
2
2
2
2
4
1
1
1
Functional
Arithmetic
Program
Control
Logical
Group
DALU
Move
AGU
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