MSC8101PG Motorola / Freescale Semiconductor, MSC8101PG Datasheet - Page 78

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MSC8101PG

Manufacturer Part Number
MSC8101PG
Description
MSC8101PG 16-Bit Digital Signal Processor Quick Reference
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
PPC_ALRH
PPC_ALRL
LCL_ACR
Reset
Reset
Reset
Reset
Reset
Bits
4–7
2
Bit
Bit
Bit
Bit
Bit
PRKM
DBGD
16
16
0
0
0
0
0
1
Name
0
0
PowerPC 60x Bus Arbitration-Level Register
PowerPC 60x Bus Arbitration-Level Register
PowerPC Local Bus Arbiter Configuration Register
Priority Field 12
Priority Field 0
Priority Field 4
Priority Field 8
17
17
1
0
1
1
0
1
Parking Master
Data Bus Grant Delay
18
18
2
0
1
2
0
0
1
0
19
19
3
0
1
3
0
0
Description
20
20
4
0
1
4
0
1
DBGD
2
0
Priority Field 13
Priority Field 1
Priority Field 5
Priority Field 9
Table 6-8. SIU Registers (Continued)
21
21
5
0
0
5
0
1
LCL_ACR Bit Descriptions
22
22
6
0
0
6
0
0
3
0
23
23
7
1
0
7
1
1
0000 = CPM high request level
0001 = CPM middle request level
0010 = CPM low request level
0011 = Reserved
0100 = Reserved
0101 = SC140 core interface
0110 = Reserved
0 = DBG asserted with TS if the data bus is free.
1 = DBG asserted one cycle after TS if the data bus is not busy.
24
24
8
0
1
8
1
1
4
0
Priority Field 10
Priority Field 14
Priority Field 2
Priority Field 6
25
25
9
0
0
9
0
1
10
26
10
26
1
0
1
1
5
0
11
27
11
27
0
1
0
0
Settings
PRKM
0111 = External master 1
1000 = External master 2
1001 = External master 3
1010 = DMA priority 0
1011 = DMA priority 1
1100 = DMA priority 2
1101
12
28
12
28
Type: R/W
Type: R/W
Type: R/W
0
0
1
1
1111 = Reserved
6
1
Priority Field 11
Priority Field 15
Priority Field 3
Priority Field 7
13
29
13
29
1
0
0
1
14
30
14
30
1
1
1
1
7
0
0x1002C
0x10030
0x10034
15
31
15
31
0
1
1
1

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