MSC8101PG Motorola / Freescale Semiconductor, MSC8101PG Datasheet - Page 21

• Manufacturer Part Number: MSC8101PG
• Description: MSC8101PG 16-Bit Digital Signal Processor Quick Reference
• Manufacturer: Motorola / Freescale Semiconductor

PUPMWAIT
PSDAMUX
PSDRAS
PSDCAS
PSDWE
PGPL1
PGPL2
PGPL3
PGPL4
PGPL5
Name
PGTA
PPBS
TRST
POE
TMS
TCK
TDI
Direction
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Input
Input
Input
Input
Input
Input
Data
Table 3-1. External Signals–SIU and Extended Core (Continued)
60x Bus SDRAM Write Enable
Output from the 60x bus SDRAM controller. This pin should connect to the SDRAM WE
input signal.
60x Bus UPM General-Purpose Line 1
One of six general-purpose output lines from the UPM. The values and timing of this pin
are programmed in the UPM.
60x Bus Output Enable
Output of the 60x bus GPCM. Controls the output buffer of memory devices during read
operations.
60x Bus SDRAM Ras
Output from the 60x bus SDRAM controller. This pin should connect to the SDRAM RAS
input signal.
60x Bus UPM General-Purpose Line 2
One of six general-purpose output lines from the UPM. The values and timing of this pin
are programmed in the UPM.
60x Bus SDRAM CAS
Output from the 60x bus SDRAM controller. This pin should connect to the SDRAM CAS
input signal.
60x Bus UPM General-Purpose Line 3
One of six general-purpose output lines from the UPM. The values and timing of this pin
are programmed in the UPM.
60x GPCM TA
Terminates transactions during GPCM operation. Requires an external pull up resistor
for proper operation.
60x Bus UPM Wait
Input to the UPM. An external device can hold this pin high to force the UPM to wait until
the device is ready for the operation to continue.
60x Bus UPM General-Purpose Line 4
One of six general-purpose output lines from the UPM. The values and timing of this pin
are programmed in the UPM.
60x Bus Parity Byte Select
In systems in which data parity is stored in a separate chip, this output is the byte-select
for that chip.
60x Bus SDRAM Address Multiplexer
Controls the 60x SDRAM address multiplexer when the MSC8101 is in External Master
mode.
60x Bus UPM General-Purpose Line 5
One of six general-purpose output lines from the UPM. The values and timing of this pin
are programmed in the UPM.
Test Mode Select (JTAG)
Controls the state of the MSC8101 JTAG/COP controller.
Test Data In (JTAG)
Data input to the MSC8101 JTAG/COP controller.
Test Clock (JTAG)
Provides the clock input for the MSC8101 JTAG/COP controller.
Test Reset (JTAG)
The reset input to the MSC8101 JTAG/COP controller.
MSC8101 Programmer’s Quick Reference
Description
External Signals
13