SAM3U2E Atmel Corporation, SAM3U2E Datasheet - Page 956

• Manufacturer Part Number: SAM3U2E
• Manufacturer: Atmel Corporation

Specifications of SAM3U2E

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 57
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 5
• Twi (i2c): 2
• Uart: 5
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 36
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

39.6.4
39.6.5
956
956
SAM3U Series
SAM3U Series
USB V2.0 High Speed BUS Transactions
Endpoint Configuration
Each transfer results in one or more transactions over the USB bus.
There are five kinds of transactions flowing across the bus in packets:
Figure 39-3. Control Read and Write Sequences
A status IN or OUT transaction is identical to a data IN or OUT transaction.
The endpoint 0 is always a control endpoint, it must be programmed and active in order to be
enabled when the End Of Reset interrupt occurs.
To configure the endpoints:
Note: For control endpoints the direction has no effect.
Control endpoints can generate interrupts and use only 1 bank.
1. Setup Transaction
2. Data IN Transaction
3. Data OUT Transaction
4. Status IN Transaction
5. Status OUT Transaction
• Fill the configuration register (UDPHS_EPTCFG) with the endpoint size, direction (IN or
• Fill the number of transactions (NB_TRANS) for isochronous endpoints.
• Verify that the EPT_MAPD flag is set. This flag is set if the endpoint size and the number of
• Configure control flags of the endpoint and enable it in UDPHS_EPTCTLENBx according to
OUT), type (CTRL, Bulk, IT, ISO) and the number of banks.
banks are correct compared to the FIFO maximum capacity and the maximum number of
allowed banks.
“UDPHS Endpoint Control Register” on page
Control Write
Control Read
No Data
Control
Setup Stage
Setup Stage
Setup Stage
Setup TX
Setup TX
Setup TX
Status Stage
Status IN TX
Data OUT TX
Data IN TX
Data Stage
Data Stage
1002.
Data OUT TX
Data IN TX
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
Status OUT TX
Status Stage
Status Stage
Status IN TX