SAM3U2E Atmel Corporation, SAM3U2E Datasheet - Page 169

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SAM3U2E

Manufacturer Part Number
SAM3U2E
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3U2E

Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
57
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
5
Twi (i2c)
2
Uart
5
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
13.19.4
• SETPEND
Interrupt set-pending bits.
Write:
0 = no effect.
1 = changes interrupt state to pending.
Read:
0 = interrupt is not pending.
1 = interrupt is pending.
Writing 1 to the ISPR bit corresponding to:
6430E–ATARM–29-Aug-11
• an interrupt that is pending has no effect
• a disabled interrupt sets the state of that interrupt to pending
31
23
15
7
Interrupt Set-pending Registers
30
22
14
6
The ISPR0 register forces interrupts into the pending state, and shows which interrupts are
pending. See:
The bit assignments are:
• the register summary in
Table 13-28 on page 166
29
21
13
5
28
20
12
4
Table 13-27 on page 165
for which interrupts are controlled by each register.
SETPEND
SETPEND
SETPEND
SETPEND
27
19
11
3
for the register attributes
26
18
10
2
SAM3U Series
25
17
9
1
24
16
8
0
169

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