SAM3U2E Atmel Corporation, SAM3U2E Datasheet - Page 856

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SAM3U2E

Manufacturer Part Number
SAM3U2E
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3U2E

Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
57
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
5
Twi (i2c)
2
Uart
5
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
36
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
• RTOE: Response Time-out Error
0 = No error.
1 = The response time-out set by MAXLAT in the HSMCI_CMDR has been exceeded. Cleared when writing in the
HSMCI_CMDR.
• DCRCE: Data CRC Error
0 = No error.
1 = A CRC16 error has been detected in the last data block. Cleared by reading in the HSMCI_SR register.
• DTOE: Data Time-out Error
0 = No error.
1 = The data time-out set by DTOCYC and DTOMUL in HSMCI_DTOR has been exceeded. Cleared by reading in the
HSMCI_SR register.
• CSTOE: Completion Signal Time-out Error
0 = No error.
1 = The completion signal time-out set by CSTOCYC and CSTOMUL in HSMCI_CSTOR has been exceeded. Cleared by
reading in the HSMCI_SR register. Cleared by reading in the HSMCI_SR register.
• BLKOVRE: DMA Block Overrun Error
0 = No error.
1 = A new block of data is received and the DMA controller has not started to move the current pending block, a block over-
run is raised. Cleared by reading in the HSMCI_SR register.
• DMADONE: DMA Transfer done
0 = DMA buffer transfer has not completed since the last read of HSMCI_SR register.
1 = DMA buffer transfer has completed.
• FIFOEMPTY: FIFO empty flag
0 = FIFO contains at least one byte.
1 = FIFO is empty.
• XFRDONE: Transfer Done flag
0 = A transfer is in progress.
1 = Command register is ready to operate and the data bus is in the idle state.
• ACKRCV: Boot Operation Acknowledge Received
0 = No Boot acknowledge received since the last read of the status register.
1 = A Boot acknowledge signal has been received. Cleared by reading the HSMCI_SR register.
• ACKRCVE: Boot Operation Acknowledge Error
0 = No error
1 = Corrupted Boot Acknowledge signal received.
856
856
SAM3U Series
SAM3U Series
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11

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