SAM3U2E Atmel Corporation, SAM3U2E Datasheet - Page 522

• Manufacturer Part Number: SAM3U2E
• Manufacturer: Atmel Corporation

Specifications of SAM3U2E

• Flash (kbytes): 128 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 96 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 57
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 96
• Ext Interrupts: 96
• Usb Transceiver: 1
• Quadrature Decoder Channels: 1
• Usb Speed: Hi-Speed
• Usb Interface: Device
• Spi: 5
• Twi (i2c): 2
• Uart: 5
• Ssc: 1
• Sd / Emmc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 16
• Adc Resolution (bits): 12
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 36
• Self Program Memory: YES
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

30.7
Table 30-2.
522
522
Offset
0x0000
0x0004
0x0008
0x000C
0x0010
0x0014
0x0018
0x001C
0x0020
0x0024
0x0028
0x002C
0x0030
0x0034
0x0038
0x003C
0x0040
0x0044
0x0048
0x004C
0x0050
0x0054
0x0058
0x005C
0x0060
0x0064
0x0068
0x006C
Parallel Input/Output Controller (PIO) User Interface
SAM3U Series
SAM3U Series
Register
PIO Enable Register
PIO Disable Register
PIO Status Register
Reserved
Output Enable Register
Output Disable Register
Output Status Register
Reserved
Glitch Input Filter Enable Register
Glitch Input Filter Disable Register
Glitch Input Filter Status Register
Reserved
Set Output Data Register
Clear Output Data Register
Output Data Status Register
Pin Data Status Register
Interrupt Enable Register
Interrupt Disable Register
Interrupt Mask Register
Interrupt Status Register
Multi-driver Enable Register
Multi-driver Disable Register
Multi-driver Status Register
Reserved
Pull-up Disable Register
Pull-up Enable Register
Pad Pull-up Status Register
Reserved
Register Mapping
Each I/O line controlled by the PIO Controller is associated with a bit in each of the PIO Controller
User Interface registers. Each register is 32 bits wide. If a parallel I/O line is not defined, writing to the
corresponding bits has no effect. Undefined bits read zero. If the I/O line is not multiplexed with any
peripheral, the I/O line is controlled by the PIO Controller and PIO_PSR returns 1 systematically.
(4)
PIO_PER
PIO_PDR
PIO_IFER
PIO_IER
PIO_IDR
PIO_MDER
PIO_MDDR
PIO_PUER
Name
PIO_PSR
PIO_OER
PIO_ODR
PIO_OSR
PIO_IFDR
PIO_IFSR
PIO_SODR
PIO_CODR
PIO_ODSR
PIO_PDSR
PIO_IMR
PIO_ISR
PIO_MDSR
PIO_PUDR
PIO_PUSR
Read-write
Read-only
Read-only
Write-only
Read-only
Read-only
Read-only
Write-only
Write-only
Read-only
Read-only
Read-only
Write-only
Read-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Write-only
Access
or
(2)
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
0x0000 0000
0x0000 0000
0x00000000
0x00000000
0x00000000
0x00000000
Reset
(1)
(3)
–
–
–
–
–
–
–
–
–
–
–
–
–
–