ATmega32U4 Atmel Corporation, ATmega32U4 Datasheet - Page 43
ATmega32U4
Manufacturer Part Number
ATmega32U4
Description
Manufacturer
Atmel Corporation
Specifications of ATmega32U4
Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
14
Hardware Qtouch Acquisition
No
Max I/o Pins
26
Ext Interrupts
13
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
3.3
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
12
Input Capture Channels
2
Pwm Channels
8
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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7. Power Management and Sleep Modes
7.0.1
7766F–AVR–11/10
Sleep Mode Control Register – SMCR
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
To enter any of the five sleep modes, the SE bit in SMCR must be written to logic one and a
SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select
which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, or Standby) will be
activated by the SLEEP instruction. See
while the MCU is in a sleep mode, the MCU wakes up. The MCU is then halted for four cycles in
addition to the start-up time, executes the interrupt routine, and resumes execution from the
instruction following SLEEP. The contents of the Register File and SRAM are unaltered when
the device wakes up from sleep. If a reset occurs during sleep mode, the MCU wakes up and
executes from the Reset Vector.
Figure 6-1 on page 27
and their distribution. The figure is helpful in selecting an appropriate sleep mode.
The Sleep Mode Control Register contains control bits for power management.
• Bits 3, 2, 1 – SM2..0: Sleep Mode Select Bits 2, 1, and 0
These bits select between the six available sleep modes as shown in
Table 7-1.
Note:
• Bit 1 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
Bit
Read/Write
Initial Value
SM2
0
0
0
0
1
1
1
1
1. Standby modes are only recommended for use with external crystals or resonators.
7
–
R
0
Sleep Mode Select
SM1
0
0
1
1
0
0
1
1
6
–
R
0
presents the different clock systems in the ATmega16U4/ATmega32U4,
5
–
R
0
SM0
0
1
0
1
0
1
0
1
4
–
R
0
Table 7-1
Sleep Mode
Idle
ADC Noise Reduction
Power-down
Power-save
Reserved
Reserved
Standby
Extended Standby
3
SM2
R/W
0
for a summary. If an enabled interrupt occurs
(1)
2
SM1
R/W
0
(1)
1
SM0
R/W
0
ATmega16/32U4
Table
0
SE
R/W
0
7-1.
SMCR
43
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