ATmega32U4 Atmel Corporation, ATmega32U4 Datasheet - Page 40
ATmega32U4
Manufacturer Part Number
ATmega32U4
Description
Manufacturer
Atmel Corporation
Specifications of ATmega32U4
Flash (kbytes)
32 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
14
Hardware Qtouch Acquisition
No
Max I/o Pins
26
Ext Interrupts
13
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
3.3
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
12
Input Capture Channels
2
Pwm Channels
8
32khz Rtc
No
Calibrated Rc Oscillator
Yes
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6.10.2
6.10.3
7766F–AVR–11/10
PLL Control and Status Register – PLLCSR
PLL Frequency Control Register – PLLFRQ
Figure 6-6.
• Bit 7..5 – Res: Reserved Bits
These bits are reserved bits in the ATmega16U4/ATmega32U4 and always read as zero.
• Bit 4 – PINDIV PLL Input Prescaler (1:1, 1:2)
These bits allow to configure the PLL input prescaler to generate the 8MHz input clock for the
PLL from either a 8 or 16 MHz input.
When using a 8 MHz clock source, this bit must be set to 0 before enabling PLL (1:1).
When using a 16 MHz clock source, this bit must be set to 1 before enabling PLL (1:2).
• Bit 3..2 – Res: Reserved Bits
These bits are reserved bits in the ATmega16U4/ATmega32U4 and always read as zero.
• Bit 1 – PLLE: PLL Enable
When the PLLE is set, the PLL is started. Note that the Calibrated 8 MHz Internal RC oscillator is
automatically enabled when the PLLE bit is set and with PINMUX (see PLLFRQ register) is set.
The PLL must be disabled before entering Power down mode in order to stop Internal RC Oscil-
lator and avoid extra-consumption.
• Bit 0 – PLOCK: PLL Lock Detector
When the PLOCK bit is set, the PLL is locked to the reference clock. After the PLL is enabled, it
takes about several ms for the PLL to lock. To clear PLOCK, clear PLLE.
XTAL1
XTAL2
Bit
$29 ($29)
Read/Write
Initial Value
Bit
$32
Read/Write
Initial Value
RC OSCILLATOR
8 MHz
OSCILLATOR
XTAL
7
R
0
7
PINMUX
R/W
0
PLL Clocking System
6
R
0
6
PLLUSB
R/W
0
CKSEL3:0
5
R
0
5
PLLTM1
R/W
0
To System
Clock Prescaler
PLL clock
Prescaler
PINDIV
4
PINDIV
R/W
0
4
PLLTM0
R/W
0
3
R
0
3
R/W
0
PINMUX
PDIV3
0
1
clk
8MHz
2
R
0
2
R/W
1
PLOCK
PDIV2
Detector
Lock
PDIV3..0
PLL
ATmega16/32U4
PLLE
1
PLLE
R/W
0
1
R/W
0
PDIV1
/1.5
0
PLOCK
R
0
0
R/W
0
/2
PDIV0
PLLTM1:0
PLLUSB
10
11
01
1
0
PLLCSR
PLLFRQ
clk TMR
clk USB
40
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