ATmega32U4 Atmel Corporation, ATmega32U4 Datasheet - Page 280

• Manufacturer Part Number: ATmega32U4
• Manufacturer: Atmel Corporation

Specifications of ATmega32U4

• Flash (kbytes): 32 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 14
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 26
• Ext Interrupts: 13
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 3.3
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 12
• Input Capture Channels: 2
• Pwm Channels: 8
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

7766F–AVR–11/10
• 3 - EORSTE - End Of Reset Interrupt Enable Bit
Set to enable the EORSTI interrupt. This bit is set after a reset.
Clear to disable the EORSTI interrupt.
• 2 - SOFE - Start Of Frame Interrupt Enable Bit
Set to enable the SOFI interrupt.
Clear to disable the SOFI interrupt.
• 1 - Reserved
The value read from this bits is always 0. Do not set this bit
• 0 - SUSPE - Suspend Interrupt Enable Bit
Set to enable the SUSPI interrupt.
Clear to disable the SUSPI interrupt.
• 7 - ADDEN - Address Enable Bit
Set to activate the UADD (USB address).
Cleared by hardware. Clearing by software has no effect.
See Section 22.7, page 268 for more details.
• 6-0 - UADD6:0 - USB Address Bits
Load by software to configure the device address.
• 7-3 - Reserved
The value read from these bits is always 0. Do not set these bits.
• 2-0 - FNUM10:8 - Frame Number Upper Value
Set by hardware. These bits are the 3 MSB of the 11-bits Frame Number information. They are
provided in the last received SOF packet. FNUM is updated if a corrupted SOF is received.
Bit
Read/Write
Initial Val-
ue
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
ADDEN
W
7
0
R
R
7
0
7
0
-
R/W
6
0
R
6
0
R
-
6
0
R/W
R
5
0
-
R
5
0
5
0
R/W
R
4
0
-
R
4
0
4
0
FNUM7:0
UADD6:0
R/W
R
3
0
-
R
3
0
3
0
R/W
R
2
0
R
2
0
ATmega16/32U4
2
0
FNUM10:8
R/W
R
1
0
R
1
0
1
0
R/W
R
0
0
R
0
0
0
0
UDFNUMH
UDFNUML
UDADDR
280