S5920Q Applied Micro Circuits Corporation, S5920Q Datasheet - Page 154

• Manufacturer Part Number: S5920Q
• Manufacturer: Applied Micro Circuits Corporation

Specifications of S5920Q

• Operating Temperature (min): 0C
• Operating Temperature Classification: Commercial
• Operating Temperature (max): 70C
• Package Type: PQFP
• Rad Hardened: No
• Lead Free Status / Rohs Status: Not Compliant

S5920 – PCI Product: Electrical Characteristics
Table 6 summarizes the A. C. characteristics for the Add-On bus signals as they apply to the S5920. The figures
after Table 6 visually indicate the timing relationships.
Table 64. Add-On Timings, Functional Operation Range
(V
AMCC Confidential and Proprietary
TACL
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
10
11
12
13
14
15
16
17a
17b
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
CC
Symbol
= 5.0 V ± 5%, 0°C to 7 0°C, 50 pF load on outputs for MAX, 0 pF load for MIN)
ADCLK Cycle Time
ADCLK High Time
ADCLK Low Time
ADCLK Rise Time (0.8V to 2.0V)
ADCLK Fall Time (2.0V to 0.8V)
PCICLK to BPCLK Delay, Rising
PCICLK to BPCLK Delay, Falling
PTADR# Low to DQ[31:0] Output Valid
PTADR# High to DQ[31:0] Output Hold
PTADR# High to DQ[31:0] Output Float
PTATN# Valid from ADCLK Rising Edge
PTATN# Hold from ADCLK Rising Edge
PTBURST# Valid from ADCLK Rising Edge
PTBURST# Hold from ADCLK Rising Edge
PTNUM[1:0] Valid from ADCLK Rising Edge
PTNUM[1:0] Hold from ADCLK Rising Edge
PTWR Valid from ADCLK Rising Edge
PTWR Hold from ADCLK Rising Edge
PTBE[3:0]# Valid from ADCLK Rising Edge
PTBE[3:0]#Hold from ADCLK Rising Edge
PTWAIT# Setup to ADCLK Rising Edge
PTWAIT# Hold from ADCLK Rising Edge
SELECT# Setup to ADCLK Rising Edge
SELECT# Hold from ADCLK Rising Edge
ADR[6:2] Setup to ADCLK Rising Edge
ADR[6:2] Hold from ADCLK Rising Edge
Parameter
Min
8.9
9.3
25
10
10
11
2
4
4
4
4
3
1
1
1
Max
13.1
13.5
14.4
13.1
14.4
11.9
2.5
2.5
5.3
6.2
13
Revision 1.02 – April 12, 2007
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Data Book
DS1596
Notes
1
1
1
154