Z16FMC32AG20EG Zilog, Z16FMC32AG20EG Datasheet - Page 147

Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D

Z16FMC32AG20EG

Manufacturer Part Number
Z16FMC32AG20EG
Description
Microcontrollers (MCU) 16BIT 32K FL 2K RAM 2UART 12CH 10BIT A/D
Manufacturer
Zilog
Series
Z16FMCr
Datasheet

Specifications of Z16FMC32AG20EG

Processor Series
Z16FMC
Core
ZNEO
Data Bus Width
16 bit
Program Memory Type
Flash
Program Memory Size
32 KB
Data Ram Size
2 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
46
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
LQFP-64
Development Tools By Supplier
Z16FMC28200KITG
Minimum Operating Temperature
- 40 C
Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
46
Eeprom Size
-
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z16FMC32AG20EG
Manufacturer:
Zilog
Quantity:
160
Part Number:
Z16FMC32AG20EG
Manufacturer:
Zilog
Quantity:
10 000
PS028702-1210
System
Clock
Operation
LIN-UART
Figure 21 displays the operation of the noise filter with and without noise. The noise filter
in this example is a 2-bit up/down counter, which saturates at
ter is shown for convenience, the operation of wider counters is similar. The output of the
filter switches from 1 to 0 when the counter counts down from
from 0 to 1 when the counter counts up from
received data by three system clock cycles.
The
time. The presence of noise (
pled data is incorrect, just that the filter is not in its saturated state of all 1’s or all 0’s. If
FiltSatB
eStatus[4:0]
by observing this bit.
FiltSatB
=
Figure 20. Noise Filter System Block Diagram
1
NFEN, NFCTL
when RxD is sampled during a receive character, the
signal is checked when the filtered RxD is sampled in the center of the bit
field is set. An indication of the level of noise in the network is obtained
FiltSatB
RxD
TxD
P R E L I M I N A R Y
FiltSatB
Noise Filter
= 1 at center of bit time) does not mean the sam-
10b
Z16FMC Series Motor Control MCUs
to
11b
. The noise filter delays the
TxD
RxD
00b
01b
Product Specification
and
to
NE
00b
11b
bit in the
RxD
TxD
Transceiver
. A 2-bit coun-
and switches
LIN
LIN-UART
Mod-
125

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