PIC16F636-I/P Microchip Technology Inc., PIC16F636-I/P Datasheet - Page 87

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PIC16F636-I/P

Manufacturer Part Number
PIC16F636-I/P
Description
14 PIN, 3.5 KB FLASH, 128 RAM, 12 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F636-I/P

Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
12
Memory Type
Flash
Number Of Bits
8
Package Type
14-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
1-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
PIC12F635/PIC16F636/639
11.15 Configurable Output Enable Filter
The purpose of this filter is to enable the LFDATA output
and wake the microcontroller only after receiving a
specific sequence of pulses on the LC input pins.
Therefore, it prevents the AFE from waking up the
microcontroller due to noise or unwanted input signals.
The circuit compares the timing of the demodulated
header waveform with a pre-defined value, and enables
the demodulated LFDATA output when a match occurs.
The output enable filter consists of a high (T
) and
OEH
low duration (T
) of a pulse immediately after the
OEL
AGC settling gap time. The selection of high and low
times further implies a max period time. The output
enable high and low times are determined by SPI
interface programming. Figure 11-5 and Figure 11-6
show the output enable filter waveforms.
There should be no missing cycles during T
.
OEH
Missing cycles may result in failing the output enable
condition.
FIGURE 11-5:
OUTPUT ENABLE FILTER TIMING
Required Output Enable Sequence
Data Packet
T
STAB
(T
+ T
)
AGC
PAGC
Demodulator
T
GAP
Output
t
T
t
T
OEH
OEL
Start bit
AGC
AFE
Wake-up
Gap Pulse
LFDATA output is enabled
and AGC Stabilization
t
T
OET
on this rising edge
Preliminary
© 2005 Microchip Technology Inc.
DS41232B-page 85

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