PIC16F636-I/P Microchip Technology Inc., PIC16F636-I/P Datasheet - Page 17

• Manufacturer Part Number: PIC16F636-I/P
• Description: 14 PIN, 3.5 KB FLASH, 128 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F636-I/P

• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 12
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 14-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

TABLE 2-2:
© 2005 Microchip Technology Inc.
Addr
Bank 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch PIR1
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note 1:
INDF
TMR0
PCL
STATUS
FSR
GPIO
PCLATH
INTCON
TMR1L
TMR1H
T1CON
WDTCON
CMCON0
CMCON1
2:
Name
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
— = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition,
shaded = unimplemented
Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
MCLR and WDT Reset do not affect the previous value data latch. The RAIF bit will be cleared upon Reset but will set
again if the mismatch exists.
Addressing this location uses contents of FSR to address data memory
(not a physical register)
Timer0 Module Register
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Holding Register for the Least Significant Byte of the 16-bit TMR1
Holding Register for the Most Significant Byte of the 16-bit TMR1
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
T1GINV TMR1GE T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS
Bit 7
EEIF
PIC12F635 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0
GIE
IRP
—
—
—
—
—
C1OUT
LVDIF
PEIE
Bit 6
RP1
—
—
—
—
CRIF
Bit 5
GP5
T0IE
RP0
—
—
—
—
Write Buffer for upper 5 bits of Program Counter
WDTPS3 WDTPS2 WDTPS1 WDTPS0 SWDTEN ---0 1000 ---0 1000
C1INV
INTE
Bit 4
GP4
TO
—
—
PIC12F635/PIC16F636/639
Preliminary
RAIE
Bit 3
C1IF
GP3
CIS
PD
—
OSFIF
Bit 2
CM2
GP2
T0IF
—
Z
T1GSS
Bit 1
INTF
CM1
GP1
DC
—
CMSYNC ---- --10 ---- --10
TMR1ON 0000 0000 uuuu uuuu
TMR1IF
RAIF
Bit 0
CM0
GP0
C
(2)
xxxx xxxx xxxx xxxx
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
0001 1xxx 000q quuu
xxxx xxxx uuuu uuuu
--xx xx00 --uu uu00
---0 0000 ---0 0000
0000 0000 0000 0000
000- 00-0 000- 00-0
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
-0-0 0000 -0-0 0000
POR/BOD/
Value on
WUR
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DS41232B-page 15
Resets
Value on
all other
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(1)