PIC16F636-I/P Microchip Technology Inc., PIC16F636-I/P Datasheet - Page 40

• Manufacturer Part Number: PIC16F636-I/P
• Description: 14 PIN, 3.5 KB FLASH, 128 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F636-I/P

• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 12
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 14-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC12F635/PIC16F636/639
REGISTER 3-2:
TABLE 3-2:
DS41232B-page 38
0Ch
8Ch
8Fh
90h
2007h
Legend:
Note 1:
Address
(1)
PIR1
PIE1
OSCCON
OSCTUNE
CONFIG
bit 7
bit 6-4
bit 3
bit 2
bit 1
bit 0
x = unknown, u = unchanged, — = unimplemented locations read as ‘0’. Shaded cells are not used by oscillators.
See Register 12-1 for operation of all Configuration Word register bits.
Name
SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK SOURCES
OSCCON – OSCILLATOR CONTROL REGISTER (ADDRESS: 8Fh)
Unimplemented: Read as ‘0’
IRCF<2:0>: Nominal Internal Oscillator Frequency Select bits
000 = 31 kHz
001 = 125 kHz
010 = 250 kHz
011 = 500 kHz
100 = 1 MHz
101 = 2 MHz
110 = 4 MHz
111 = 8 MHz
OSTS: Oscillator Start-up Time-out Status bit
1 = Device is running from the external system clock defined by FOSC<2:0>
0 = Device is running from the internal system clock (HFINTOSC or LFINTOSC)
HTS: HFINTOSC (High Frequency – 8 MHz to 125 kHz) Status bit
1 = HFINTOSC is stable
0 = HFINTOSC is not stable
LTS: LFINTOSC (Low Frequency – 31 kHz) Stable bit
1 = LFINTOSC is stable
0 = LFINTOSC is not stable
SCS: System Clock Select bit
1 = Internal oscillator is used for system clock
0 = Clock source defined by FOSC<2:0>
bit 7
Legend:
R = Readable bit
- n = Value at POR
EEIE
Bit 7
EEIF
CPD
Note 1: Bit resets to ‘0’ with Two-Speed Start-up and LP, XT or HS selected as the Oscillator
—
—
U-0
—
LVDIF
LVDIE
IRCF2
Bit 6
CP
—
mode or Fail-Safe mode is enabled.
R/W-1
IRCF2
MCLRE PWRTE
IRCF1
CRIE
CRIF
Bit 5
—
R/W-1
IRCF1
IRCF0
TUN4
Preliminary
Bit 4
C2IF
C2IE
W = Writable bit
‘1’ = Bit is set
WDTE
OSTS
TUN3
C1IE
Bit 3
C1IF
R/W-0
IRCF0
FOSC2 FOSC1 FOSC0
(1)
OSFIF
OSFIE
TUN2
Bit 2
HTS
OSTS
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-1
TUN1
Bit 1
LTS
(1)
—
—
TMR1IF 0000 00-0 0000 00-0
TMR1IE 0000 00-0 0000 00-0
HTS
TUN0
R-0
Bit 0
SCS
© 2005 Microchip Technology Inc.
-110 x000 -110 x000
---0 0000 ---u uuuu
POR, BOD,
Value on:
x = Bit is unknown
WUR
LTS
R-0
—
Value on
all other
R/W-0
Resets
SCS
—
bit 0