PIC16F636-I/P Microchip Technology Inc., PIC16F636-I/P Datasheet - Page 116

• Manufacturer Part Number: PIC16F636-I/P
• Description: 14 PIN, 3.5 KB FLASH, 128 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F636-I/P

• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 12
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 14-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC12F635/PIC16F636/639
12.3
The on-chip POR circuit holds the chip in Reset until V
has reached a high enough level for proper operation. To
take advantage of the POR, simply connect the MCLR
pin through a resistor to V
RC components usually needed to create Power-on
Reset. A maximum rise time for V
Section 15.0 “Electrical Specifications” for details. If
the BOD is enabled, the maximum rise time specification
does not apply. The BOD circuitry will keep the device in
Reset until V
“Brown-out Detect (BOD)”).
When the device starts normal operation (exits the
Reset condition), device operating parameters (i.e.,
voltage, frequency, temperature, etc.) must be met to
ensure operation. If these conditions are not met, the
device must be held in Reset until the operating
conditions are met.
For additional information, refer to the Application Note
AN607, “Power-up Trouble Shooting” (DS00607).
12.4
The PIC12F635/PIC16F636/639 has a modified wake-
up from Sleep mechanism. When waking from Sleep,
the WUR function resets the device and releases Reset
when V
If the WURE bit is enabled (‘0’) in the Configuration
Word register, the device will Wake-up Reset from
Sleep through one of the following events:
1.
2.
The WUR, POR and BOD bits in the PCON register
and the TO and PD bits in the Status register can be
used to determine the cause of device Reset.
To allow WUR upon RA3 change:
1.
2.
3.
4.
5.
DS41232B-page 114
Note:
On any event that causes a wake-up event. The
peripheral must be enabled to generate an
interrupt or wake-up, GIE state is ignored.
When WURE is enabled, RA3 will always
generate an interrupt-on-change signal during
Sleep.
Enable the WUR function, WURE Configuration
Bit = 0.
Enable RA3 as an input, MCLRE Configuration
Bit = 0.
Read PORTA to establish the current state of
RA3.
Execute SLEEP instruction.
When RA3 changes state, the device will wake-
up and then reset. The WUR bit in PCON will be
cleared to ‘0’.
DD
Power-on Reset
Wake-up Reset (WUR)
reaches an acceptable level.
The POR circuit does not produce an
internal Reset when V
re-enable the POR, V
for a minimum of 100 s.
DD
reaches V
DD
. This will eliminate external
BOD
DD
DD
(see Section 12.6
DD
must reach V
is required. See
declines. To
Preliminary
SS
DD
12.5
PIC12F635/PIC16F636/639 has a noise filter in the
MCLR Reset path. The filter will ignore small pulses.
It should be noted that a WDT Reset does not drive
MCLR pin low. See Figure 12-2 for the recommended
MCLR circuit.
An internal MCLR option is enabled by clearing the
MCLRE bit in the Configuration Word register. When
cleared, MCLR is internally tied to V
weak pull-up is enabled for the MCLR pin. In-Circuit
Serial Programming is not affected by selecting the
internal MCLR option.
FIGURE 12-2:
V
DD
R1
1 k
C1
0.1 F
(optional, not critical)
MCLR
or greater)
RECOMMENDED MCLR
CIRCUIT
© 2005 Microchip Technology Inc.
MCLR
PIC12F635/PIC16F636/639
DD
and an internal