PIC16F636-I/P Microchip Technology Inc., PIC16F636-I/P Datasheet - Page 135

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PIC16F636-I/P

Manufacturer Part Number
PIC16F636-I/P
Description
14 PIN, 3.5 KB FLASH, 128 RAM, 12 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F636-I/P

Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
12
Memory Type
Flash
Number Of Bits
8
Package Type
14-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
1-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
13.2
ADDLW
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
ADDWF
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
© 2005 Microchip Technology Inc.
Instruction Descriptions
Add Literal and W
[ label ] ADDLW
0
(W) + k
The contents of the W register are
added to the eight-bit literal ‘k’ and
the result is placed in the W register.
Add W and f
[ label ] ADDWF
0
d
(W) + (f)
Add the contents of the W register
with register ‘f’. If ‘d’ is ‘0’, the result
is stored in the W register. If ‘d’ is ‘1’,
the result is stored back in register ‘f’.
AND W with f
[ label ] ANDWF
0
d
(W) .AND. (f)
Z
AND the W register with register
‘f’. If ‘d’ is ‘0’, the result is stored in
the W register. If ‘d’ is ‘1’, the
result is stored back in register ‘f’.
AND Literal with W
[ label ] ANDLW
0
(W) .AND. (k)
Z
The contents of W register are
AND’ed with the eight-bit literal
‘k’. The result is placed in the W
register.
k
f
0,1
f
[0,1]
k
127
255
127
255
(W)
(destination)
(destination)
(W)
k
f,d
f,d
k
PIC12F635/PIC16F636/639
Preliminary
BCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
BSF
Syntax:
Operands:
Operation:
Status Affected:
Description:
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Description:
BTFSS
Syntax:
Operands:
Operation:
Status Affected: None
Description:
Bit Test f, Skip if Set
[ label ] BTFSS f,b
0
0
skip if (f<b>) = 1
If bit ‘b’ in register ‘f’ is ‘0’, the next
instruction is executed.
If bit ‘b’ is ‘1’, then the next instruction is
discarded and a NOP is executed instead,
making this a 2-cycle instruction.
Bit Test f, Skip if Clear
[ label ] BTFSC f,b
0
0
skip if (f<b>) = 0
None
If bit ‘b’ in register ‘f’ is ‘1’, the next
instruction is executed.
If bit ‘b’ in register ‘f’ is ‘0’, the next
instruction is discarded and a NOP
is executed instead, making this a
2-cycle instruction.
Bit Clear f
[ label ] BCF
0
0
0
None
Bit ‘b’ in register ‘f’ is cleared.
Bit Set f
[ label ] BSF
0
0
1
None
Bit ‘b’ in register ‘f’ is set.
f
b < 7
f
b
f
b
f
b
127
(f<b>)
(f<b>)
127
7
127
127
7
7
f,b
f,b
DS41232B-page 133

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