PIC16F636-I/P Microchip Technology Inc., PIC16F636-I/P Datasheet - Page 73

• Manufacturer Part Number: PIC16F636-I/P
• Description: 14 PIN, 3.5 KB FLASH, 128 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F636-I/P

• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 12
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 14-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

8.0
The Programmable Low-Voltage Detect module is an
interrupt driven supply level detection. The voltage
detection monitors the internal power supply.
REGISTER 8-1:
TABLE 8-1:
© 2005 Microchip Technology Inc.
94h
0Bh/8Bh INTCON
0Ch
8Ch
Legend:
Note 1:
Address
PROGRAMMABLE
LOW-VOLTAGE DETECT
(PLVD) MODULE
LVDCON
PIR1
PIE1
bit 7-6
bit 5
bit 4
bit 3
bit 2-0
x = unknown, u = unchanged, — = unimplemented, read as ‘0’. Shaded cells are not used by the comparator or
comparator voltage reference module.
PIC16F636/639 only.
Name
REGISTERS ASSOCIATED WITH PROGRAMMABLE LOW-VOLTAGE DETECT
LVDCON – LOW-VOLTAGE DETECT CONTROL REGISTER (ADDRESS: 94h)
EEIF
EEIE
Bit 7
bit 7
Unimplemented: Read as ‘0’
IRVST: Internal Reference Voltage Stable Status Flag bit
1 = Indicates that the PLVD is stable and PLVD interrupt is reliable
0 = Indicates that the PLVD is not stable and PLVD interrupt should not be enabled
LVDEN: Low-Voltage Detect Power Enable bit
1 = Enables PLVD, powers up PLVD circuit and supporting reference circuitry
0 = Disables PLVD, powers down PLVD and supporting circuitry
Unimplemented: Read as ‘0’
LVDL<2:0>: Low-Voltage Detection Limit bits (nominal values)
111 = 4.5V
110 = 4.2V
101 = 4.0V
100 = 2.3V (default)
011 = 2.2V
010 = 2.1V
001 = 2.0V
000 = 1.9V
Legend:
R = Readable bit
- n = Value at POR
GIE
—
Note 1: Not tested and below minimum V
U-0
—
LVDIF
LVDIE
Bit 6
PEIE
—
(1)
U-0
—
IRVST
CRIE
CRIF
Bit 5
T0IE
IRVST
PIC12F635/PIC16F636/639
LVDEN
C2IE
R-0
Bit 4
INTE
C2IF
Preliminary
W = Writable bit
‘1’ = Bit is set
(1)
RAIE
Bit 3
C1IF
C1IE
LVDEN
—
R/W-0
8.1
The PIC12F635/PIC16F636/639 device supports eight
internal PLVD trip points. See Register 8-1 for available
PLVD trip point voltages.
LVDL2
OSFIF
OSFIE
Bit 2
DD
T0IF
.
Voltage Trip Points
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
—
LVDL1
Bit 1
INTF
—
—
TMR1IF 0000 00-0 0000 00-0
TMR1IE 0000 00-0 0000 00-0
LVDL2
R/W-1
LVDL0
RAIF
Bit 0
--00 -000 --00 -000
0000 0000 0000 0000
POR, BOD,
Value on
x = Bit is unknown
WUR
LVDL1
R/W-0
DS41232B-page 71
Value on
all other
Resets
LVDL0
R/W-0
bit 0