PIC16F636-I/P Microchip Technology Inc., PIC16F636-I/P Datasheet - Page 57

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PIC16F636-I/P

Manufacturer Part Number
PIC16F636-I/P
Description
14 PIN, 3.5 KB FLASH, 128 RAM, 12 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F636-I/P

Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
12
Memory Type
Flash
Number Of Bits
8
Package Type
14-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
1-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
5.4
An 8-bit counter is available as a prescaler for the
Timer0 module, or as a postscaler for the Watchdog
Timer. For simplicity, this counter will be referred to as
“prescaler” throughout this data sheet. The prescaler
assignment is controlled in software by the control bit,
PSA (OPTION_REG<3>). Clearing the PSA bit will
assign the prescaler to Timer0. Prescale values are
selectable via the PS<2:0> bits (OPTION_REG<2:0>).
The prescaler is not readable or writable. When
assigned to the Timer0 module, all instructions writing
to the TMR0 register (e.g., CLRF 1, MOVWF 1, BSF 1,
x....etc.) will clear the prescaler. When assigned to
WDT, a CLRWDT instruction will clear the prescaler
along with the Watchdog Timer.
5.4.1
The prescaler assignment is fully under software control
(i.e., it can be changed “on the fly” during program
execution). To avoid an unintended device Reset, the
following instruction sequence (Example 5-1 and
Example 5-2) must be executed when changing the
prescaler assignment from Timer0 to WDT.
TABLE 5-1:
© 2005 Microchip Technology Inc.
01h
0Bh/8Bh INTCON
81h
85h
Legend:
Address
Prescaler
TMR0
OPTION_REG
TRISA
— = Unimplemented locations, read as ‘0’, u = unchanged, x = unknown. Shaded cells are not used by the Timer0 module.
SWITCHING PRESCALER
ASSIGNMENT
Name
REGISTERS ASSOCIATED WITH TIMER0
Timer0 Module Register
RAPU
Bit 7
GIE
INTEDG
PEIE
Bit 6
TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 --11 1111 --11 1111
T0CS
Bit 5
T0IE
PIC12F635/PIC16F636/639
Preliminary
T0SE
INTE
Bit 4
RAIE
Bit 3
PSA
EXAMPLE 5-1:
To change prescaler from the WDT to the TMR0
module, use the sequence shown in Example 5-2. This
precaution must be taken even if the WDT is disabled.
EXAMPLE 5-2:
BCF
BCF
CLRWDT
CLRF
BSF
BCF
MOVLW
MOVWF
CLRWDT
MOVLW
MOVWF
BCF
BCF
CLRWDT
BSF
BCF
MOVLW
MOVWF
BCF
BCF
Bit 2
T0IF
PS2
STATUS,RP0
STATUS,RP1
TMR0
STATUS,RP0
STATUS,RP1
b’00101111’
OPTION_REG
b’00101xxx’
OPTION_REG
STATUS,RP0
STATUS,RP1
STATUS,RP0
STATUS,RP1
b’xxxx0xxx’
OPTION_REG
STATUS,RP0
STATUS,RP1
Bit 1
INTF
PS1
CHANGING PRESCALER
(TIMER0
CHANGING PRESCALER
(WDT
RAIF
Bit 0
PS0
;Bank 0
;
;Clear WDT
;Clear TMR0 and
; prescaler
;Bank 1
;
;Required if desired
; PS2:PS0 is
; 000 or 001
;
;Set postscaler to
; desired WDT rate
;Bank 0
;
;Clear WDT and
;prescaler
;Bank 1
;
;Select TMR0,
;prescale, and
;clock source
;
;Bank 0
;
xxxx xxxx uuuu uuuu
0000 0000 0000 0000
1111 1111 1111 1111
POR, BOD,
Value on
TIMER0)
WUR
DS41232B-page 55
WDT)
Value on
all other
Resets

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