PIC16F636-I/P Microchip Technology Inc., PIC16F636-I/P Datasheet - Page 42
PIC16F636-I/P
Manufacturer Part Number
PIC16F636-I/P
Description
14 PIN, 3.5 KB FLASH, 128 RAM, 12 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F636-IP.pdf
(196 pages)
Specifications of PIC16F636-I/P
Comparators
2
Cpu Speed
5 MIPS
Eeprom Memory
256 Bytes
Input Output
12
Memory Type
Flash
Number Of Bits
8
Package Type
14-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
1-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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PIC12F635/PIC16F636/639
REGISTER 4-1:
REGISTER 4-2:
DS41232B-page 40
bit 7-6
bit 5-4
bit 3
bit 2-0
bit 7-6
bit 5-4
bit 3
bit 2-0
WDA – WEAK PULL-UP/PULL-DOWN REGISTER (ADDRESS: 97h)
WPUDA – WEAK PULL-UP/PULL-DOWN DIRECTION REGISTER (ADDRESS: 95h)
bit 7
Unimplemented: Read as ‘0’
WDA<5:4>: Pull-up/Pull-down Selection bits
1 = Pull-up selected
0 = Pull-down selected
Unimplemented: Read as ‘0’
WDA<2:0>: Pull-up/Pull-down Selection bits
1 = Pull-up selected
0 = Pull-down selected
bit 7
Unimplemented: Read as ‘0’
WPUDA<5:4>: Pull-up/Pull-down Direction Selection bits
1 = Pull-up/pull-down enabled
0 = Pull-up/pull-down disabled
Unimplemented: Read as ‘0’
WPUDA<2:0>: Pull-up/Pull-down Direction Selection bits
1 = Pull-up/pull-down enabled
0 = Pull-up/pull-down disabled
Legend:
R = Readable bit
- n = Value at POR
Legend:
R = Readable bit
- n = Value at POR
Note 1: The weak pull-up/pull-down device is enabled only when the global RAPU bit is
Note 1: The weak pull-up/pull-down direction device is enabled only when the global RAPU bit
U-0
U-0
—
—
2: RA3 pull-up is enabled when the pin is configured as MCLR in the Configuration
2: RA3 pull-up is enabled when the pin is configured as MCLR in the Configuration
3: WPUDA5 bit can be written if INTOSC is enabled and T1OSC is disabled;
enabled, the pin is in Input mode (TRIS = 1), the individual WDA bit is enabled
(WDA = 1) and the pin is not configured as an analog input or clock function.
Word register and the device is not in Programming mode.
is enabled, the pin is in Input mode (TRIS = 1), the individual WPUDA bit is enabled
(WPUDA = 1) and the pin is not configured as an analog input or clock function.
Word register and the device is not in Programming mode.
otherwise, the bit can not be written and reads as ‘1’. WPUDA4 bit can be written
if not configured as OSC2; otherwise, the bit can not be written and reads as ‘1’.
U-0
—
U-0
—
WPUDA5
R/W-1
R/W-1
WDA5
Preliminary
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
(3)
WPUDA4
WDA4
R/W-1
R/W-1
(3)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
(3)
WPUDA2 WPUDA1 WPUDA0
R/W-1
WDA2
R/W-1
© 2005 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
WDA1
R/W-1
R/W-1
WDA0
R/W-1
R/W-1
bit 0
bit 0
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