PIC16F636-I/P Microchip Technology Inc., PIC16F636-I/P Datasheet - Page 115

• Manufacturer Part Number: PIC16F636-I/P
• Description: 14 PIN, 3.5 KB FLASH, 128 RAM, 12 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F636-I/P

• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 12
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 14-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 1-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

12.2
The PIC12F635/PIC16F636/639 differentiates between
various kinds of Reset:
a)
b)
c)
d)
e)
f)
g)
Some registers are not affected in any Reset condition;
their status is unknown on POR and unchanged in any
other Reset. Most other registers are reset to a “Reset
state” on:
• Power-on Reset
• MCLR Reset
• MCLR Reset during Sleep
• WDT Reset
• Brown-out Detect
FIGURE 12-1:
© 2005 Microchip Technology Inc.
Note 1:
MCLR/V
Power-on Reset (POR)
Wake-up Reset (WUR)
WDT Reset during normal operation
WDT Reset during Sleep
MCLR Reset during normal operation
MCLR Reset during Sleep
Brown-out Detect (BOD)
CLKI pin
OSC1/
V
Reset
DD
PP
Refer to the Configuration Word register (Register 12-1).
pin
LFINTOSC
OST/PWRT
Brown-out
V
Module
Detect
DD
Detect
SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT
WDT
Rise
BODEN<0>
OST
PWRT
SBODEN
(1)
10-bit Ripple Counter
WDT
Time-out
Reset
11-bit Ripple Counter
BODEN
External Reset
Power-on Reset
Sleep
<1>
PIC12F635/PIC16F636/639
Preliminary
Wake-up Interrupt
RA3 Change
They are not affected by a WDT wake-up since this is
viewed as the resumption of normal operation. TO and
PD bits are set or cleared differently in different Reset
situations, as indicated in Table 12-3. These bits are
used in software to determine the nature of the Reset.
See Table 12-4 for a full description of Reset states of
all registers.
A simplified block diagram of the On-Chip Reset Circuit
is shown in Figure 12-1.
The MCLR Reset path has a noise filter to detect and
ignore small pulses. See Section 15.0 “Electrical
Specifications” for pulse width specifications.
WURE
Sleep
Enable PWRT
Enable OST
S
R
DS41232B-page 113
Q
Chip_Reset