MC68MH360ZP33L Freescale Semiconductor, MC68MH360ZP33L Datasheet - Page 937

• Manufacturer Part Number: MC68MH360ZP33L
• Description: IC MPU 32BIT QUICC 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360ZP33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Figure D-5 shows the line interface unit, LIU, being the master and providing the QUICC32
with clocks. It is also possible to let the QUICC32 be the master and provide clocks and syn-
chronization pulses through its baud rate generators, both to itself and other devices on the
TDM bus.
D.2.4 The QMC Microcode
The standard QUICC can handle one logical channel performing the protocol framework for
each of its serial channels. This logical channel can be used in time division multiplexed
interfaces as described above. The QMC protocol emulates up to 32 serial controllers that
can operate in either HDLC mode or transparent mode within one single SCC.
The QMC microcode is ROM based and in order to create enough memory space, the
QUICC32 has the Centronics and BISYNC protocols removed.
The QUICC32 has the internal dual-port RAM enlarged by 192 bytes to accommodate the
parameters used by the QMC microcode.
The standard QUICC housed all the buffer descriptor table in internal RAM and the actual
data areas in either internal or external RAM. The QUICC32 needs an area in external mem-
ory for its buffer descriptor. This reserved memory area shall start at an address on a 64 K
boundary. The data buffers have to reside in external main memory. See Figure D-6 for
memory partitioning.
MOTOROLA
Freescale Semiconductor, Inc.
For More Information On This Product,
LIU
Figure D-5. TDM Connections
MC68360 USER’S MANUAL
Go to: www.freescale.com
Tx
Rx
Rx AND Tx CLOCKS AND FRAME SYNCHRONIZATION
OTHER SYSTEM
FUNCTIONS
QUICC32
MC68MH360 Product Brief
OTHER PCM
LINE DEVICES
D-7