MC68MH360ZP33L Freescale Semiconductor, MC68MH360ZP33L Datasheet - Page 460

• Manufacturer Part Number: MC68MH360ZP33L
• Description: IC MPU 32BIT QUICC 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68MH360ZP33L

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -

Serial Communication Controllers (SCCs)
FM0 A 1 is represented by a transition at the beginning of the bit
FM1 A 1 is represented by a transition at the beginning of the bit
ManchesterA 1 is represented by a high to low transition at the center of
Differential ManchesterA 1 is represented by a transition at the center of the bit with
7.10.12.2 DPLL OPERATION. Each SCC channel includes a DPLL used to recover clock
information from a received data stream. For applications that provide a direct clock source
to the SCC, the DPLL may be bypassed as programmed in the GSMR.
The DPLL must not be used when an SCC is programmed to Ethernet. It is optional for other
protocols.
The DPLL receive block diagram is shown in Figure 7-44; the transmit block diagram is
shown in Figure 7-45.
7-136
A 0 is represented by no transition at all.
only.
A 0 is represented by a transition at the beginning of the bit
and another transition at the center of the bit.
and another transition at the center of the bit.
A 0 is represented by a transition at the beginning of the bit
only.
the bit.
A 0 is represented by a low to high transition at the center of
the bit. In both cases there may be a transition at the beginning
of the bit to set up the level required to make the correct center
transition.
the opposite direction from the transition at the center of the
preceding bit.
A 0 is represented by a transition at the center of the bit with
the same polarity from the transition at the center of the
preceding bit.
Freescale Semiconductor, Inc.
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MC68360 USER’S MANUAL
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