Z85C3010PSG Zilog, Z85C3010PSG Datasheet - Page 21

IC 10MHZ Z8500 CMOS SCC 40-DIP

Z85C3010PSG

Manufacturer Part Number
Z85C3010PSG
Description
IC 10MHZ Z8500 CMOS SCC 40-DIP
Manufacturer
Zilog
Series
SCCr
Datasheets

Specifications of Z85C3010PSG

Processor Type
Z80
Features
Error Detection and Multiprotocol Support
Speed
10MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Cpu Speed
8MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
85
Rohs Compliant
Yes
Clock Frequency
10MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3934
Z85C3010PSG

Available stocks

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SCC™/ESCC™ User’s Manual
Interfacing the SCC/ESCC
2.2 Z80X30 INTERFACE TIMING (Continued)
2.2.1 Z80X30 Read Cycle Timing
The read cycle timing for the Z80X30 is shown in Figure 2-1.
The register address on AD7-AD0, as well as the state of
/CS0 and /INTACK, are latched by the rising edge of /AS.
2-2
AD7 - AD0
/INTACK
/CS0
R//W
CS1
/AS
/DS
Address
Figure 2-1. Z80X30 Read Cycle
R//W must be High before /DS falls to indicate a read
cycle. The Z80X30 data bus drivers are enabled while CS1
is High and /DS is Low.
Data Valid
UM010901-0601

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