Z85C3010PSG Zilog, Z85C3010PSG Datasheet - Page 15

IC 10MHZ Z8500 CMOS SCC 40-DIP

Z85C3010PSG

Manufacturer Part Number
Z85C3010PSG
Description
IC 10MHZ Z8500 CMOS SCC 40-DIP
Manufacturer
Zilog
Series
SCCr
Datasheets

Specifications of Z85C3010PSG

Processor Type
Z80
Features
Error Detection and Multiprotocol Support
Speed
10MHz
Voltage
5V
Mounting Type
Through Hole
Package / Case
40-DIP (0.620", 15.75mm)
Cpu Speed
8MHz
Digital Ic Case Style
DIP
No. Of Pins
40
Supply Voltage Range
5V
Operating Temperature Range
0°C To +70°C
Svhc
No SVHC (18-Jun-2010)
Base Number
85
Rohs Compliant
Yes
Clock Frequency
10MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-3934
Z85C3010PSG

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UM010901-0601
1.4 PIN DESCRIPTIONS
The SCC pins are divided into seven functional groups:
Address/Data, Bus Timing and Reset, Device Control, In-
terrupt, Serial Data (both channels), Peripheral Control
(both channels), and Clocks (both channels). Figures 1-2
and 1-3 show the pins in each functional group for both
Z80X30 and Z85X30. Notice the pin functions unique to
each bus interface version in the Address/Data group, Bus
Timing and Reset group, and Control groups.
The Address/Data group consists of the bidirectional lines
used to transfer data between the CPU and the SCC (Ad-
dresses in the Z80X30 are latched by /AS). The direction
of these lines depends on whether the operation is a Read
or Write.
Bus Timing
Data Bus
and Reset
Interrupt
Control
Figure 1-2. Z85X30 Pin Functions
D7
D6
D5
D4
D3
D2
D1
D0
/RD
/WR
A//B
/CE
D//C
/INT
/INTACK
IEI
IEO
Z85X30
/DTR//REQA
The timing and control groups designate the type of trans-
action to occur and when it will occur. The interrupt group
provides inputs and outputs to conform to the Z-Bus
specifications for handling and prioritizing interrupts. The
remaining groups are divided into channel A and channel
B groups for serial data (transmit or receive), peripheral
control (such as DMA or modem), and the input and output
lines for the receive and transmit clocks.
The signal functionality and pin assignments (Figures 1-4
to 1-7) stay constant within the same bus interface group
(i.e., Z80X30, Z85X30), except for some timing and/or DC
specification differences. For details, please reference the
individual product specifications.
/DTR//REQB
/W//REQA
/W//REQB
/TRxCA
/TRxCB
/RTxCA
/SYNCA
/RTxCB
/SYNCB
/DCDA
/DCDB
TxDA
/RTSA
/CTSA
TxDB
RxDB
/RTSB
/CTSB
RxDA
SCC™/ESCC™ User’s Manual
Serial
Data
Channel
Clocks
Channel
Controls
for Modem,
DMA and
Other
Serial
Data
Channel
Clocks
Channel
Controls
for Modem,
DMA and
Other
General Description
1-5
®
1

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