EP4CGX15BF14C8N Altera, EP4CGX15BF14C8N Datasheet - Page 217
![IC CYCLONE IV FPGA 15K 169FBGA](/photos/6/73/67316/169-fbga_sml.jpg)
EP4CGX15BF14C8N
Manufacturer Part Number
EP4CGX15BF14C8N
Description
IC CYCLONE IV FPGA 15K 169FBGA
Manufacturer
Altera
Series
CYCLONE® IV GXr
Datasheets
1.EP4CGX15BN11C8N.pdf
(44 pages)
2.EP4CGX15BN11C8N.pdf
(14 pages)
3.EP4CGX15BN11C8N.pdf
(478 pages)
4.EP4CGX15BN11C8N.pdf
(10 pages)
Specifications of EP4CGX15BF14C8N
Number Of Logic Elements/cells
14400
Number Of Labs/clbs
900
Total Ram Bits
540000
Number Of I /o
72
Voltage - Supply
1.16 V ~ 1.24 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
169-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-1475
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP4CGX15BF14C8N
Manufacturer:
ALTERA33
Quantity:
276
- EP4CGX15BN11C8N PDF datasheet
- EP4CGX15BN11C8N PDF datasheet #2
- EP4CGX15BN11C8N PDF datasheet #3
- EP4CGX15BN11C8N PDF datasheet #4
- Current page: 217 of 478
- Download datasheet (13Mb)
Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices
Configuration
© December 2010 Altera Corporation
f
f
1
JTAG configuration allows an unlimited number of Cyclone IV devices to be cascaded
in a JTAG chain.
For more information about configuring multiple Altera devices in the same
configuration chain, refer to the
volume 2 of the Configuration Handbook.
Figure 8–27
microprocessor.
Figure 8–27. JTAG Configuration of a Single Device Using a Microprocessor
Notes to
(1) You must connect the pull-up resistor to a supply that provides an acceptable input signal for all devices in the chain.
(2) Connect the nCONFIG and MSEL pins to support a non-JTAG configuration scheme. If you only use a JTAG
(3) You must connect the nCE pin to GND or driven low for successful JTAG configuration.
(4) All I/O inputs must maintain a maximum AC voltage of 4.1 V. Signals driving into TDI, TMS, and TCK must fit the
Configuring Cyclone IV Devices with Jam STAPL
Jam
programmability (ISP) purposes. Jam STAPL supports programming or configuration
of programmable devices and testing of electronic systems, using the IEEE 1149.1
JTAG interface. Jam STAPL is a freely licensed open standard. The Jam Player
provides an interface for manipulating the IEEE Std. 1149.1 JTAG TAP state machine.
For more information about JTAG and Jam STAPL in embedded environments, refer
to
download the Jam Player, visit the Altera website (www.altera.com).
AN 425: Using Command-Line Jam STAPL Solution for Device
configuration, connect the nCONFIG pin to logic-high and the MSEL pins to GND. In addition, pull DCLK and
DATA[0] to either high or low, whichever is convenient on your board.
maximum overshoot outlined in
™
STAPL, JEDEC standard JESD-71, is a standard file format for in-system
Figure
shows JTAG configuration with a Cyclone IV device and a
8–27:
Microprocessor
ADDR
Memory
DATA
Equation 8–1 on page
Configuring Mixed Altera FPGA Chains
N.C.
(2)
(2)
(2)
nCONFIG
DATA[0]
DCLK
TDI (4)
TCK (4)
TMS (4)
nCEO
nCE
Cyclone IV Device
8–5.
(3)
CONF_DONE
nSTATUS
MSEL[ ]
TDO
Cyclone IV Device Handbook, Volume 1
V
(2)
CCIO
Programming. To
10 kΩ
(1)
V
CCIO
10 kΩ
(1)
chapter in
8–51
Related parts for EP4CGX15BF14C8N
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![DK-CYCII-2C20N](/photos/9/20/92074/mfgdk-cycii-2c20nboard_tmb.jpg)
Part Number:
Description:
CYCLONE II STARTER KIT EP2C20N
Manufacturer:
Altera
Datasheet:
![EP610PC-35](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 35 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-15](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 15 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP610IPC-25](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-30](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 30 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-10](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-7](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 7ns
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-12](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Classic EPLD
Manufacturer:
Altera Corporation
Datasheet:
![EP220PC-10A](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
High-performance, low-power erasable programmable logic devices with 8 macrocells, 10ns
Manufacturer:
Altera Corporation
Datasheet:
![P85C224-66](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP320PC](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP2A15B724C7](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
Manufacturer:
Altera Corporation
Datasheet:
![EP610PC-25T](/images/manufacturer_photos/0/0/41/altera_corporation_tmb.jpg)
Part Number:
Description:
CPLD, EP610 Family, ECMOS Process, 300 Gates, 16 Macro Cells, 16 Reg., 16 User I/Os, 5V Supply, 25 Speed Grade, 24DIP
Manufacturer:
Altera Corporation
Datasheet: