TWR-K60N512-KEIL Freescale Semiconductor, TWR-K60N512-KEIL Datasheet - Page 99

• Manufacturer Part Number: TWR-K60N512-KEIL
• Description: K60N512 Keil Tower Kit
• Manufacturer: Freescale Semiconductor
• Series: Kinetisr
• Type: MCUr

Specifications of TWR-K60N512-KEIL

• Rohs Compliant: YES
• Contents: 4 Boards, Documentation, DVD
• Peak Reflow Compatible (260 C): Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Freescale Tower System, K60N512

is asserted
bus speed
/* Set base address mask for 512K address space */
/* Reference clock divided by 3 */
SIM_CLKDIV1 &= ~SIM_CLKDIV1_OUTDIV3(0xF);
SIM_CLKDIV1 |= SIM_CLKDIV1_OUTDIV3(0x3);
/* 8 bit write */
*(vuint8*)(MRAM_START_ADDRESS + n) = 0xAC;
/* 8 bit read */
rdata8=(*(vuint8*)(&MRAM_START_ADDRESS + n));
/* 16 bit write */
*(vuint16*)(MRAM_START_ADDRESS + n) = 0x1234;
/* 16 bit read */
rdata16=(*(vuint16*)(&MRAM_START_ADDRESS + n));
/* 32 bit write */
*(vuint32*)(MRAM_START_ADDRESS + n) = 0x87654321;
/* 32 bit read */
rdata32=(*(vuint32*)(&MRAM_START_ADDRESS + n));
Freescale Semiconductor
/* Set BE0/1 to MRAM */
FB_CSPMCR |= 0x02200000;
FB_CSMR0 |= FB_CSMR_BAM(0x7);
/* Configure the pins needed to FlexBus Function (Alt 5) */
/* this example uses low drive strength settings
//address/Data
PORTA_PCR7=PORT_PCR_MUX(5);
PORTA_PCR8=PORT_PCR_MUX(5);
PORTA_PCR9=PORT_PCR_MUX(5);
PORTA_PCR10=PORT_PCR_MUX(5);
PORTA_PCR24=PORT_PCR_MUX(5);
PORTA_PCR25=PORT_PCR_MUX(5);
PORTA_PCR26=PORT_PCR_MUX(5);
PORTA_PCR27=PORT_PCR_MUX(5);
PORTA_PCR28=PORT_PCR_MUX(5);
PORTD_PCR10=PORT_PCR_MUX(5);
PORTD_PCR11=PORT_PCR_MUX(5);
PORTD_PCR12=PORT_PCR_MUX(5);
PORTD_PCR13=PORT_PCR_MUX(5);
PORTD_PCR14=PORT_PCR_MUX(5);
PORTE_PCR8=PORT_PCR_MUX(5);
PORTE_PCR9=PORT_PCR_MUX(5);
PORTE_PCR10=PORT_PCR_MUX(5);
PORTE_PCR11=PORT_PCR_MUX(5);
PORTE_PCR12=PORT_PCR_MUX(5);
//control signals
PORTA_PCR11=PORT_PCR_MUX(5);
PORTD_PCR15=PORT_PCR_MUX(5);
PORTE_PCR7=PORT_PCR_MUX(5);
PORTE_PCR6=PORT_PCR_MUX(5);
// | FB_CSCR_WS(0x1)
| FB_CSCR_PS(1)
| FB_CSCR_AA_MASK
| FB_CSCR_ASET(0x1)
;
Kinetis Quick Reference User Guide, Rev. 0, 11/2010
// 8-bit port
// auto-acknowledge
// assert chip select on second clock edge after address
// 1 wait state - may need a wait state depending on the
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// n=offset
// n = offset
// n=offset
// n = offset
// n = offset
// n = offset
*/
Chapter 10 Flexbus Module
99