TWR-K60N512-KEIL Freescale Semiconductor, TWR-K60N512-KEIL Datasheet - Page 171

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TWR-K60N512-KEIL

Manufacturer Part Number
TWR-K60N512-KEIL
Description
K60N512 Keil Tower Kit
Manufacturer
Freescale Semiconductor
Series
Kinetisr
Type
MCUr

Specifications of TWR-K60N512-KEIL

Rohs Compliant
YES
Contents
4 Boards, Documentation, DVD
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Freescale Tower System, K60N512
// channel 1 pretrigger 0 and 1 enabled and delayed
this file
the counter clock
registers!
triggered at this time.
18.2.1.4 Determine ADC configuration
Set up the initial ADC default configuration. This configuration is set into a structure
where it can be reused as required prior to and after calibration for either ADC.
Freescale Semiconductor
PDB_CH0DLY0 = ADC0_DLYA ;
PDB_CH0DLY1 = ADC0_DLYB ;
PDB_CH1C1 = PDB_CH1C1_EN(0x01)
PDB_CH1DLY0 = ADC1_DLYA ;
PDB_CH1DLY1 = ADC1_DLYB ;
PDB_SC =
Master_Adc_Config.CONFIG1
Master_Adc_Config.CONFIG2
Master_Adc_Config.COMPARE1 = 0x1234u ;
Master_Adc_Config.COMPARE2 = 0x5678u ;
Master_Adc_Config.STATUS2
Master_Adc_Config.STATUS3
Master_Adc_Config.PGA
Master_Adc_Config.STATUS1A = AIEN_OFF | DIFF_SINGLE | ADC_SC1_ADCH(31);
Master_Adc_Config.STATUS1B = AIEN_OFF | DIFF_SINGLE | ADC_SC1_ADCH(31);
Chapter 18 Using Peripheral Delay Block (PDB) to Schedule Analog to Digital Converter (ADC) Conversions
| PDB_SC_PDBEN_MASK
| PDB_SC_PDBIE_MASK
| PDB_SC_PRESCALER(0x5)
| PDB_SC_TRGSEL(0xf)
| PDB_SC_MULT(2)
| PDB_SC_LDOK_MASK;
| PDB_CH0C1_TOS(0x01)
| PDB_CH0C1_EN(0x02)
| PDB_CH0C1_TOS(0x02) ;
| PDB_CH1C1_TOS(0x01)
| PDB_CH1C1_EN(0x02)
| PDB_CH1C1_TOS(0x02) ;
PDB_SC_CONT_MASK
Kinetis Quick Reference User Guide, Rev. 0, 11/2010
= ADLPC_NORMAL
| ADC_CFG1_ADIV(ADIV_4)
| ADLSMP_LONG
| ADC_CFG1_MODE(MODE_16)
| ADC_CFG1_ADICLK(ADICLK_BUS);
= MUXSEL_ADCA
| ADACKEN_DISABLED
| ADHSC_HISPEED
| ADC_CFG2_ADLSTS(ADLSTS_20) ;
= ADTRG_HW
| ACFE_DISABLED
| ACFGT_GREATER
| ACREN_ENABLED
| DMAEN_DISABLED
| ADC_SC2_REFSEL(REFSEL_EXT);
= CAL_OFF
| ADCO_SINGLE
| AVGE_ENABLED
| ADC_SC3_AVGS(AVGS_32);
= PGAEN_DISABLED
| PGACHP_NOCHOP
| PGALP_NORMAL
| ADC_PGA_PGAG(PGAG_64);
// Continuous, rather than one-shot, mode
// PDB enabled
// PDB Interrupt Enable
// Slow down the period of the PDB for testing
// Trigger source is Software Trigger to be invoked in
// Multiplication factor 20 for the prescale divider for
// Need to ok the loading or it will not load certain
// the software trigger, PDB_SC_SWTRIG_MASK is not
// can be anything
// can be anything
// since not using
// compare feature
171

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