TWR-K60N512-KEIL Freescale Semiconductor, TWR-K60N512-KEIL Datasheet - Page 55

• Manufacturer Part Number: TWR-K60N512-KEIL
• Description: K60N512 Keil Tower Kit
• Manufacturer: Freescale Semiconductor
• Series: Kinetisr
• Type: MCUr

Specifications of TWR-K60N512-KEIL

• Rohs Compliant: YES
• Contents: 4 Boards, Documentation, DVD
• Peak Reflow Compatible (260 C): Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Freescale Tower System, K60N512

The modules available in each of the power modes is a described in a table. Please see
Module operation in low power modes
each of the low power modes.
5.2.1.2 Features
Mode Control controls entry into and exit from each of the power modes.
5.2.2 Configuration examples
How you decide which modes to use in your solution is an exercise in matching the
requirements of your system, and selecting which modules are needed during each mode
of the operation for your application. The best way to explain would be to work through
an example.
For example, consider the case of a battery-operated human interface device that requires
a real-time clock timebase. It will wake up every second, update the time of day, and
check the conditions of several sensors. Then it will take action based upon the state and,
when requested, perform high levels of computation to control the operation of a device.
After reviewing the power modes table in
should be able to identify which of the modules are functioning in each of the low power
modes.
At this point in this example, notice that the RTC, the segment LCD, the TSI and the
comparator are among a few modules that are fully functional in several of the lowest
power modules.
In this example system, the MCU would spend most of the time in one of the lowest
power modes waking up every second to update the time of day variables and update the
display, plus other house-keeping tasks.
Freescale Semiconductor
10. Very low leakage stop 1(VLLS1) — Lowest Power Mode ARM core enters
9. Very low leakage stop 2(VLLS2) — ARM core enters SleepDeep Mode, NVIC is
disabled, LLWU is used to wake up, peripheral clocks are stopped, Only portion of
SRAM is operating (content retained and I/O states held), most modules are disabled.
SleepDeep Mode, NVIC is disabled, LLWU is used to wake up, peripheral clocks are
stopped, All SRAM is powered down and I/O states held), most modules are
disabled, only two 32byte register file modules retained and I/O states held.
Kinetis Quick Reference User Guide, Rev. 0, 11/2010
for the details of the module operations in the
Module operation in low power modes
Chapter 5 Power Management Controller (PMC/MODECTL)
, you
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