TWR-K60N512-KEIL Freescale Semiconductor, TWR-K60N512-KEIL Datasheet - Page 13

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TWR-K60N512-KEIL

Manufacturer Part Number
TWR-K60N512-KEIL
Description
K60N512 Keil Tower Kit
Manufacturer
Freescale Semiconductor
Series
Kinetisr
Type
MCUr

Specifications of TWR-K60N512-KEIL

Rohs Compliant
YES
Contents
4 Boards, Documentation, DVD
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Freescale Tower System, K60N512
Chapter 1
General System Setup (Software Considerations)
1.1 Overview
This chapter provides a quick look at some of the general characteristics of the Kinetis
family of MCUs. This is a brief introduction of the operation of the devices and typical
software initialization.
For more information see the device-specific reference manual and data sheet.
1.2 Code execution
The Kinetis family features embedded Flash and SRAM memory for data storage and
program execution. Additionally, external memory can be accessed over the FlexBus
external bus interface. Code can also be executed over the FlexBus. For maximum
performance, executing from internal memory is recommended.
1.3 Reset and booting
When the processor exits reset, it fetches the initial stack pointer (SP) from vector table
offset 0 and the program counter (PC) from vector table offset 4. The initial vector table
must be located in the flash memory at the base address (0x0000_0000). However, the
vector table can be relocated to SRAM after the boot-up sequence if desired. Kinetis
devices only support booting from internal flash. Any secondary boot must first go
through an initialization sequence in flash.
After fetching the stack pointer and program counter, the processor branches to the PC
address and begins executing instructions.
For more information, see the Reset and Boot chapter of the device-specific reference
manual.
Kinetis Quick Reference User Guide, Rev. 0, 11/2010
Freescale Semiconductor
13

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