TWR-K60N512-KEIL Freescale Semiconductor, TWR-K60N512-KEIL Datasheet - Page 33

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TWR-K60N512-KEIL

Manufacturer Part Number
TWR-K60N512-KEIL
Description
K60N512 Keil Tower Kit
Manufacturer
Freescale Semiconductor
Series
Kinetisr
Type
MCUr

Specifications of TWR-K60N512-KEIL

Rohs Compliant
YES
Contents
4 Boards, Documentation, DVD
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Freescale Tower System, K60N512
The debug signals are multiplexed with general purpose I/O pins, so some signals will
require proper biasing to select the operating mode. The JTAG_TMS signal on PTA3
requires a strong pullup resistor for mode selection. The Cortex Debug specification
recommends that the JTAG_TCLK and JTAG_TDI pins (on PTA0 and PTA1) have pull
resistors (high or low) to force a known state on these debug input pins. Note that the
RESET_b signal in the debug interface is the MCU’s reset pin and not the JTAG_TRST
signal. The connectors for this interface are keyed dual row 0.050” centered headers.
When implementing either of these headers on a target system, pin 7 must be depopulated
to use the 19-pin or 9-pin adapters from the debug tool. The Samtec part numbers for
these connectors are:
Freescale Semiconductor
• FTSH-110-01-L-DV-K – 20-pin keyed connector
• FTSH-105-01-L-DV-K – 10-pin keyed connector
Kinetis Quick Reference User Guide, Rev. 0, 11/2010
Figure 2-7. 20-pin debug interface
Figure 2-8. 10-pin debug interface
Chapter 2 General System Setup (Hardware Considerations)
33

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