TWR-K60N512-KEIL Freescale Semiconductor, TWR-K60N512-KEIL Datasheet - Page 29

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TWR-K60N512-KEIL

Manufacturer Part Number
TWR-K60N512-KEIL
Description
K60N512 Keil Tower Kit
Manufacturer
Freescale Semiconductor
Series
Kinetisr
Type
MCUr

Specifications of TWR-K60N512-KEIL

Rohs Compliant
YES
Contents
4 Boards, Documentation, DVD
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
Freescale Tower System, K60N512
In general, capacitor values can range from 10pF for high speed conversions to 1uF for
low speed conversions. Series resistors can range from a few hundred Ohms to 10k Ω.
2.4 PCB layer stack-up
The Kinetis MCUs are high speed integrated circuits. Care must be taken in the PCB
design to ensure that fast signal transitions (rise/fall times and continuous frequencies) do
not cause RF emissions. Likewise, transient energy that enters the system needs to be
suppressed before it can affect the system operation (compatibility). The guidance from
high speed PCB designers is to have all signals routed within one dielectric (core or
prepreg) of a return path, which usually is a ground plane. This allows return currents to
predictably flow back to the source without affecting other circuits, which is the primary
cause of radiated emissions in electronic systems. This approach requires full planes
within the PCB layer stack and partial planes (copper pours) on signal layers where
possible. All ground planes and ground pours must be connected with plenty of vias.
Likewise, all “like” power planes and power pours must be connected with plenty of vias.
Recommended layer stackups:
4-Layer PCB A:
4-Layer PCB B:
6-Layer PCB A:
Freescale Semiconductor
Layer 1 (top – MCU location)—Ground plane and pads for top mounted
components, no signals
Layer 2 (inner)—signals and power plane
Thick core
Layer 3 (inner)—signals and power plane
Layer 4 (bottom)—ground plane and pads for bottom mounted components, no
signals
Layer 1 (top – MCU location)—signals and poured power
Layer 2 (inner)—ground plane
Thick core
Layer 3 (inner)—ground plane
Layer 4 (bottom)—signals and poured power
Layer 1 (top – MCU)—power plane and pads for top mounted components, no
signals
Layer 2 (inner)—signals and ground plane
Layer 3 (inner)—power plane
Layer 4 (inner)—ground plane
Layer 5 (inner)—signals and power plane
Kinetis Quick Reference User Guide, Rev. 0, 11/2010
Chapter 2 General System Setup (Hardware Considerations)
29

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