TWR-K60N512-KEIL Freescale Semiconductor, TWR-K60N512-KEIL Datasheet
TWR-K60N512-KEIL
Specifications of TWR-K60N512-KEIL
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TWR-K60N512-KEIL Summary of contents
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... The most up-to-date revisions of our documents are on the Web. Your printed copy may be an earlier revision. To verify that you have the latest information available, refer to http://freescale.com © Freescale Semiconductor, Inc., 2010. All rights reserved. KQRUG Rev. 0, 11/2010 ...
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... Revision History Revision Date Level 11/2010 0 Initial release Kinetis Peripheral Module Quick Reference, Rev Description Page Number(s) N/A Freescale Semiconductor ...
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... Jump to start of main function for application...................................................................................17 General System Setup (Hardware Considerations) 2.1 Overview.........................................................................................................................................................................19 2.2 Floorplan.........................................................................................................................................................................19 2.2.1 Connectors.........................................................................................................................................................19 2.2.2 Power domains...................................................................................................................................................20 2.3 PCB routing considerations............................................................................................................................................21 2.3.1 Power supply routing.........................................................................................................................................21 Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Contents Title Chapter 1 Chapter 2 Page 3 ...
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... Code example and explanation..........................................................................................................36 3.2.2 Relocating the vector table.................................................................................................................................38 3.2.2.1 Code example and explanation..........................................................................................................38 3.2.3 Disabling priorities.............................................................................................................................................39 3.2.3.1 Code example and explanation..........................................................................................................39 4.1 Overview.........................................................................................................................................................................41 4.2 Features...........................................................................................................................................................................41 Kinetis Quick Reference User Guide, Rev. 0, 11/2010 4 Title Chapter 3 Chapter 4 Clocking System Page Freescale Semiconductor ...
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... Overview............................................................................................................................................................54 5.2.1.1 Introduction........................................................................................................................................54 5.2.1.2 Features..............................................................................................................................................55 5.2.2 Configuration examples.....................................................................................................................................55 5.2.2.1 MC code example and explanation....................................................................................................56 5.2.2.2 Entering low leakage stop (LLS) mode.............................................................................................56 5.2.2.3 Entering wait mode............................................................................................................................57 5.2.2.4 Exiting low power modes..................................................................................................................57 Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Title Chapter 5 Page 5 ...
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... Overview.........................................................................................................................................................................69 7.1.1 Introduction .......................................................................................................................................................69 7.2 eDMA trigger..................................................................................................................................................................71 7.2.1 DMA multiplexer...............................................................................................................................................71 7.2.2 Trigger mode......................................................................................................................................................72 7.2.3 Multiple transfer requests...................................................................................................................................73 7.3 Transfer process—major and minor transfer loop..........................................................................................................74 Kinetis Quick Reference User Guide, Rev. 0, 11/2010 6 Title Chapter 6 Memory Protection Unit (MPU) Chapter 7 Page Freescale Semiconductor ...
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... Using the EzPort module ...............................................................................................................................................85 9.1.1 Overview............................................................................................................................................................85 9.1.1.1 Introduction .......................................................................................................................................85 9.1.1.2 Features .............................................................................................................................................85 9.1.1.3 Command description........................................................................................................................86 9.1.1.3.1 Command format............................................................................................................86 9.1.1.3.2 Command timing............................................................................................................87 9.1.1.4 Status register.....................................................................................................................................88 Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Title Chapter 8 Using the FlexMemory Chapter 9 EzPort Module Page 7 ...
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... Code example and explanation.......................................................................................98 10.1.1.4 Hardware implementation..................................................................................................................99 10.1.2 PCB design recommendations...........................................................................................................................100 10.1.2.1 Layout guidelines...............................................................................................................................100 Universal Asynchronous Receiver and Transmitter (UART) Module 11.1 Overview.........................................................................................................................................................................101 11.2 Features...........................................................................................................................................................................101 Kinetis Quick Reference User Guide, Rev. 0, 11/2010 8 Title Chapter 10 Flexbus Module Chapter 11 Page Freescale Semiconductor ...
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... PCB Design Recommendations......................................................................................................................................119 12.6.1 Layout Guidelines..............................................................................................................................................119 12.6.1.1 General Routing and Placement.........................................................................................................119 USB Device Charger Detection (USBDCD) Module 13.1 Overview.........................................................................................................................................................................121 13.1.1 Introduction........................................................................................................................................................121 Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Title Chapter 12 ENET Module Chapter 13 Page 9 ...
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... Example code..................................................................................................................................................................136 14.7.1 Device code........................................................................................................................................................136 14.7.2 Host code............................................................................................................................................................137 15.1 Overview.........................................................................................................................................................................141 15.1.1 Introduction........................................................................................................................................................141 15.1.2 Features..............................................................................................................................................................142 Kinetis Quick Reference User Guide, Rev. 0, 11/2010 10 Title Chapter 14 Universal Serial Bus OTG Module Chapter 15 FlexCAN Module Page Freescale Semiconductor ...
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... EMC and ESD considerations........................................................................................................................................152 16.6.1 Code example and explanation..........................................................................................................................152 16.7 Demonstration code........................................................................................................................................................154 17.1 Overview.........................................................................................................................................................................157 17.2 Introduction.....................................................................................................................................................................157 17.3 Features...........................................................................................................................................................................159 Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Title Chapter 16 Segment LCD Controller Chapter 17 Touch Sense Input (TSI) Module Page ...
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... ADC device hardware implementation..............................................................................................................174 18.2.3 PDB device hardware implementation..............................................................................................................174 18.3 PCB design recommendations........................................................................................................................................174 18.3.1 Layout guidelines...............................................................................................................................................174 18.3.1.1 General routing and placement..........................................................................................................174 18.3.2 ESD/EMI considerations ...................................................................................................................................175 Kinetis Quick Reference User Guide, Rev. 0, 11/2010 12 Title Chapter 18 Page Freescale Semiconductor ...
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... After fetching the stack pointer and program counter, the processor branches to the PC address and begins executing instructions. For more information, see the Reset and Boot chapter of the device-specific reference manual. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 13 ...
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... The vector table can be found in vectors.h. In this example the label used is __startup. 1.4.1.1 Initialize general purpose registers As a general rule recommended to initialize the processor general purpose registers (R0-R12) to zero. This is done with the move instruction. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 14 Freescale Semiconductor ...
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... WDOG_UNLOCK = 0xD928; /* enable all interrupts */ asm(" CPSIE i"); /* Clear the WDOGEN bit to disable the watchdog */ WDOG_STCTRLH &= ~WDOG_STCTRLH_WDOGEN_MASK; Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 1 General System Setup (Software Considerations) ; Initialize the GPRs ; Unmask interrupts ; call the C code 15 ...
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... Initialize the NVIC to enable the specified IRQ */ enable_irq(87); To save space, the enable_irq() function is not shown. See the interrupts section for details on how to enable the IRQ. Also, to save space the interrupt service routine is not shown. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 16 NOTE Freescale Semiconductor ...
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... Enable UART for terminal communication See in this document chapter 11, "Universal Asynchronous Receiver and Transmitter (UART) Module." 1.4.2.7 Jump to start of main function for application /* Jump to main process */ main(); Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 1 General System Setup (Software Considerations) 17 ...
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... Typical system initialization Kinetis Quick Reference User Guide, Rev. 0, 11/2010 18 Freescale Semiconductor ...
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... PCB assembly. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 19 ...
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... Also note that decoupling may not be needed in many applications – physical separation of domains may be sufficient. Figure 2-1. Generic decoupling filter Kinetis Quick Reference User Guide, Rev. 0, 11/2010 20 (Figure 2-1 ) should be used to separate different Freescale Semiconductor ...
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... As mentioned in the power domains section, decoupling networks are used to separate domains. Bypass capacitors, while also called decoupling capacitors, are the storage elements that provide the instantaneous energy demanded by the high speed digital circuits. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 2 General System Setup (Hardware Considerations) 21 ...
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... VDD and VSS pins to the power and ground planes within those layers. The bypass capacitors can be placed in the area below the MCU, with connections very close to the power pins. See Kinetis Quick Reference User Guide, Rev. 0, 11/2010 22 Figure 2-2. Freescale Semiconductor ...
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... Figure 2-2. K60 TWR board top layer BGA pad arrangement • Supply routing – For Quad Flat Pack (QFP) packages, the power supply pins may be supplied radially to the MCU using traces rather than from planes. While it is adequate to place the bypass capacitors close to the VDD and VSS pins on the traces ...
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... This guard ring can originate from the VSS pin adjacent to the crystal pins. Note that the guard ring (and load capacitors) is connected to the ground plane in Figure 2-4 and Figure 2-5. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 24 Figure 2-3 , Figure 2-4 , Freescale Semiconductor ...
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... Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 2 General System Setup (Hardware Considerations) Figure 2-3. Typical crystal circuit 25 ...
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... PCB routing considerations Figure 2-4. Potential crystal layout for BGA Kinetis Quick Reference User Guide, Rev. 0, 11/2010 26 Freescale Semiconductor ...
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... Figure 2-5. Potential crystal layout for LQFP 2.3.4 General filtering General purpose I/O pins should have adequate isolation and filtering from transients. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 2 General System Setup (Hardware Considerations) 27 ...
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... This topic cannot be discussed in detail here, but the general concept is that fast sample times will require smaller capacitor values and source impedances than slow sample times. Higher resolution inputs may require smaller capacitor values and source impedances than lower resolution inputs. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 28 Freescale Semiconductor ...
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... Layer 1 (top – MCU)—power plane and pads for top mounted components, no signals Layer 2 (inner)—signals and ground plane Layer 3 (inner)—power plane Layer 4 (inner)—ground plane Layer 5 (inner)—signals and power plane Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 2 General System Setup (Hardware Considerations) 29 ...
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... Layer 6 (inner)—signals and ground plane Layer 7 (inner)—power plane Layer 8 (bottom)—signals and ground plane 8-Layer PCB C: Layer 1 (top – MCU)—signals and ground plane Layer 2 (inner)—power plane Layer 3 (inner)—ground plane Kinetis Quick Reference User Guide, Rev. 0, 11/2010 30 Freescale Semiconductor ...
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... This pin can be sourced from the VDD supply or from a dedicated back-up battery cell. A simple battery isolator consists of a dual Schottky array with common cathodes. The TWR board example below uses the BAT54C device to provide battery back-up when the main system power is off. ...
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... The 19-pin Cortex Debug+ETM interface provides connections for JTAG and Serial Wire debugging, as well as target power. The 9-pin Cortex Debug interface provides connections for JTAG and Serial Wire debugging. implementation (19 pins populated) as used on the TWR system boards. shows the 10-pin header implementation (9 pins populated). Kinetis Quick Reference User Guide, Rev. 0, 11/2010 ...
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... The Samtec part numbers for these connectors are: • FTSH-110-01-L-DV-K – 20-pin keyed connector • FTSH-105-01-L-DV-K – 10-pin keyed connector Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 2 General System Setup (Hardware Considerations) Figure 2-7. 20-pin debug interface Figure 2-8. 10-pin debug interface 33 ...
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... This interface is useful during the development phase of a project. The header may not need to be populated in the production phase of the project, but the PCB pads should be kept available for future debugging purposes. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 34 Freescale Semiconductor ...
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... On Kinetis MCUs the NVIC provides up to 120 interrupt sources including 16 that are core specific. It also implements priority levels that are fully programmable. The NVIC uses a vector table to manage the interrupts. This vector table can be stored in either flash or RAM, depending on the application. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 35 ...
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... ARM core — ARM core — ARM core — ARM core Source description Initial stack pointer Initial program Counter NMI Hard fault Memory manage fault Bus fault Usage fault SVCall Debug monitor Pendable request for system service System tick timer Freescale Semiconductor ...
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... After the NVIC registers are set-up, finish the peripheral configuration that must enable the interrupt the ISR, clear the peripheral interrupt flag to avoid re-entrance. For this example: Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 3 Nested Vector Interrupt Controller (NVIC) Table 3-2. LPTMR vector ...
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... Copy the vector table to RAM */ if (__VECTOR_RAM != __VECTOR_TABLE) { for ( < 0x410; n++) __VECTOR_RAM[n] = __VECTOR_TABLE[n After the table has been copied, set the proper offset for the VTOR register: /* Set the VTOR RAM */ SCB_VTOR = __VECTOR_RAM; Kinetis Quick Reference User Guide, Rev. 0, 11/2010 38 //Clear LPTMR Compare flag Freescale Semiconductor ...
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... For disabling all priorities to ensure atomic code, the BASEPRI must take the maximum priority value available, for Kinetis MCUs which is priority 15 /* Disable all interrupt priorities */ __set_BASEPRI(0xF0); Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 3 Nested Vector Interrupt Controller (NVIC) 39 ...
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... Configuration examples Kinetis Quick Reference User Guide, Rev. 0, 11/2010 40 Freescale Semiconductor ...
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... Also, an example is provided of how to configure the frequency-locked loop (FLL) as the main system clock source, using the RTC oscillator as the reference clock. 4.2 Features The clocking system is summarized in Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Figure 4-1. 41 ...
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... Kinetis Quick Reference User Guide, Rev. 0, 11/2010 42 MCG CG ÷2 FLL MCGOUTCLK MCGFLLCLK MCGPLLCLK OSCCLK CG SIM Clock options for MCGIRCLK some peripherals MCGFFCLK Core / system clocks CG OUTDIV1 Bus clock CG OUTDIV2 FlexBus clock OUTDIV3 CG Flash clock CG OUTDIV4 MCGPLLCLK/ MCGFLLCLK OSCERCLK ERCLK32K PMC LPO PMC logic Real-time clock Freescale Semiconductor ...
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... This counter must then be stopped and reset after the loop exits timeout is generated, a decision can be made about what to do depending on the status bits that failed to update. For example, if the oscillator does not Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 4 Clocking System 43 ...
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... Wait for MCGOUT to switch over to the external reference clock while (((MCG_S & MCG_S_CLKST_MASK) >> MCG_S_CLKST_SHIFT) != 0x2){} // Now configure the PLL and move to PBE mode // set the PRDIV field to generate a 4MHz reference clock (8MHz /2) MCG_C5 = MCG_C5_PRDIV(1); // PRDIV=1 selects a divide by 2 Kinetis Quick Reference User Guide, Rev. 0, 11/2010 44 Freescale Semiconductor ...
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... MCG_C1 |= MCG_C1_FRDIV(3); // set FLL ref divider to 256 MCG_C6 &= ~MCG_C6_PLLS_MASK; // clear PLLS to select the FLL while (MCG_S & MCG_S_PLLST_MASK){} // Wait for PLLST status bit to clear to Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor = 96 MHz // state of the SIM_CLKDIV2 register Chapter 4 Clocking System ...
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... This has the benefit that an accurate reference clock can be used without the cost of additional external components in an application where the RTC is already being used. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 46 // indicate switch to FLL output Freescale Semiconductor ...
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... The RTC clock source comes only from the dedicated RTC oscillator. In many cases, the RTC oscillator will require only an external 32 kHz crystal. The oscillator feedback resistor is integrated within the device along with selectable internal load capacitors. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 4 Clocking System 47 ...
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... IO signals as far from the EXTAL and XTAL signals as possible • do not route signals under oscillator components - on same layer or layer below • select the functions of pins close to EXTAL and XTAL to have minimal switching to reduce injected noise Kinetis Quick Reference User Guide, Rev. 0, 11/2010 48 Freescale Semiconductor ...
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... AN1706: Microcontroller Oscillator Circuit Design Considerations • AN1783: Determining MCU Oscillator Start-Up Parameters • AN2606: Practical Considerations for Working With Low-Frequency Oscillators • AN3208: Crystal Oscillator Troubleshooting Guide Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 4 Clocking System 49 ...
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... References Kinetis Quick Reference User Guide, Rev. 0, 11/2010 50 Freescale Semiconductor ...
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... MCU below the specified VDD levels. The user has full control over the trip voltages of two detection circuits. The first is a warning detect circuit and the second is reset detect circuit. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor events. References to other DD 51 ...
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... Kinetis Quick Reference User Guide, Rev. 0, 11/2010 52 //Enable LVD Reset //Disable LVD Reset //High Trip point 2.48V //Low Trip point 1.54 V //0b00 low trip point LVWV //0b01 mid1 trip point LVWV //0b01000010 mid2 trip point LVWV //0b01000011 high trip point LVWV - 2.62 - 2.92 - 1.74 Freescale Semiconductor ...
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... External bypass capacitors should be supplied. XTAL32 and EXTAL32: Connected to a secondary watch crystal for supplying clock to the RTC module. No load capacitors or bias resistor is required as these are supplied internally. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 5 Power Management Controller (PMC/MODECTL) - 2.04 53 ...
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... Very low leakage stop3(VLLS3) — ARM core enters SleepDeep Mode, NVIC is disabled, LLWU is used to wake up, peripheral clocks are stopped, all SRAM is operating (content retained and I/O states held), most modules are disabled. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 54 Freescale Semiconductor ...
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... Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 5 Power Management Controller (PMC/MODECTL) for the details of the module operations in the Module operation in low power modes ...
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... If, for instance the UART is finishing a serial transmission it would hold off the entry into the LLS until the transmission was completed the syntax to execute the core instruction WFI is: asm("WFI"); Kinetis Quick Reference User Guide, Rev. 0, 11/2010 56 // set LPLLSM = 0b11 Freescale Semiconductor ...
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... I/O do not occur when the hold is released. The oscillator cannot be re-enabled before the ACKISO bit is cleared and must be reconfigured after the acknowledge write has been done. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 5 Power Management Controller (PMC/MODECTL) 57 ...
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... MCU. Since the RTC can all low power mode we can configure the RTC to wake up Kinetis Quick Reference User Guide, Rev. 0, 11/2010 58 for a table of the transition requirements for each of the for a table of external pin wakeup and Freescale Semiconductor ...
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... Enable LLWU Interrupt in NVIC __VECTOR_RAM[37] = (uint32)llwu_handle; // Replace ISR NVICICPR0|=(1<<21); //Clear any pending interrupts on LLWU NVICISER0|=(1<<21); //Enable interrupts from LLWU module Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 5 Power Management Controller (PMC/MODECTL) // clear Flag if there // GPIO // ...
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... RE-INITIALIZE MODULES and PORT OUTPUTS HERE LLWU_CS != LLWU_CS_ACKISO_MASK; The RTC may be powered by a separate power source and therefore would not need to re-initialized. A simple check of the state of the RTC registers to see if they are already enabled would work. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 60 } Freescale Semiconductor ...
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... Powered Sys Reg File Powered Powered VBAT Reg File VBAT Powered VBAT Powered DMA Static FF UART Static, WU 125 kbps Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 5 Power Management Controller (PMC/MODECTL) VLPR VLPW VLPS Disabled Disabled FF Wakeup FF Wakeup FF Static FF ...
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... OFF Static OFF Static OFF FF FF Static OFF Static OFF Static OFF Static OFF LS LS Static Static Static OFF Static OFF Static OFF Static Static Static OFF Static OFF Static OFF Optional Optional Static OFF Static Static Static OFF Freescale Semiconductor ...
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... RUN STOP 3 RUN VLPR* 4 VLPR* VLPW 5 VLPW 6 VLPR* VLPS 7 RUN VLPS Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 5 Power Management Controller (PMC/MODECTL) From To WAIT RUN STOP RUN VLPR* RUN VLPW VLPR* RUN VLPS VLPR* VLPS RUN Table continues on the next page... ...
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... Wakeup from enabled LLWU input source or Reset. All wakeup goes through Reset sequence. Check SRS for source of wakeup. Check LPLLSM for mode Set AVLLSx in PMPROT, LPLLSM = 101 for VLLS3, 110 for VLLS2, 111 for VLLS1, Execute STOP(); Pin function Freescale Semiconductor ...
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... LLWU LLWU_P12 LLWU_P13 LLWU_P14 LLWU_P15 LLWU_M0IF LLWU_M1IF LLWU_M2IF LLWU_M3IF LLWU_M4IF LLWU_M5IF LLWU_M6IF LLWU_M7IF Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 5 Power Management Controller (PMC/MODECTL) Pin function PTD0/DSPI0_PCS0/SCI2_RTS PTD2/SCI2_RX PTD4/SCI0_RTS/FTM0_CH4/EWM_IN PTD6/SCI0_RX/FTM0_CH6/FTM0_FLT0 LPT1 CMP0 CMP1 CMP2 TSI RTC Reserved Error Detect - wake-up source unknown ...
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... Source of wakeup, pins and modules Kinetis Quick Reference User Guide, Rev. 0, 11/2010 66 Freescale Semiconductor ...
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... This MMU implementation will be costly for the overall system – it will have a large memory footprint, higher power consumption, paging segmentation, and larger die size for Kinetis MCUs. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 67 ...
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... Bus master 0: SM all access // Bus master 0: UM all access MPU_RGD1_WORD3 = 0x00000001;// region is valid // Set RGD2 MPU_RGD2_WORD0 = (TCML_BASE + TCML_SIZE + 0x40); MPU_RGD2_WORD1 = 0xFFFFFFFF;// End Address MPU_RGD2_WORD2 = 0x0061F7DF; MPU_RGD2_WORD3 = 0x00000001;// region is valid // Enable MPU function MPU_CESR = 0x00000001; Kinetis Quick Reference User Guide, Rev. 0, 11/2010 68 Freescale Semiconductor ...
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... CPU. This results in reduced CPU loading and a corresponding increase in system performance. Figure 7-1 illustrates the functionality provided by a DMA controller. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 69 ...
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... Kinetis family. A specialized device may have differences — refer to the device-specific reference manual for details. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 70 7-1. Because Kinetis is a crossbar based architecture, the Figure 7-2 shows the basic Freescale Semiconductor ...
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... Interrupt requests. These sources can be selected through DMAMUX_CHCFGn[SOURCE] registers. But different devices may have different peripheral source configurations. Refer to the device-specific reference manual for details. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 7 Enhanced Direct Memory Access (eDMA) Controller 71 ...
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... PIT request is working as a strobe for the channel’s DMA request source, which means the DMA source may only request a DMA transfer periodically. The transfer may be started only when both the DMA request source and the period Kinetis Quick Reference User Guide, Rev. 0, 11/2010 72 Figure 7-3. Freescale Semiconductor ...
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... By default, fixed priority arbitration is implemented with each channel being assigned a priority level equal to its channel number. Higher priority channels can preempt lower priority channels. Preemption occurs when a channel is performing a transfer while a Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 7 Enhanced Direct Memory Access (eDMA) Controller 73 ...
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... In this example a channel is configured so that a major loop consists of three iterations of a minor loop. The minor loop is configured as a transfer of 4 bytes. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 74 Figure 7-6 shows the relationship between major and Freescale Semiconductor ...
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... STATUS fields are initialized at reset. All other TCD fields are undefined at reset and must be initialized by the software before the channel is activated. Failure to do this results in unpredictable behavior. Refer to the device-specific reference manual for the TCD detail description. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 7 Enhanced Direct Memory Access (eDMA) Controller 75 ...
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... After the AD has completed the conversion, the result is moved from the AD result register ADC0_RA, located at 0x4003B010, to address 0x1FFF9000 in internal SRAM. example. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 76 Figure 7-7 illustrates the functionality of this Figure 7-7. Example 2 overview Freescale Semiconductor ...
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... EDMAC_CITER_E_LINK /* Do not set ELINK bit, no channel linking */ | EDMAC_CITER(0x1) /* Current Iter Count -> 1 "NBYTES" transfer */ | EDMAC_DOFF(0x0)); /* Destination addr offset = 0x0, no increment */ EDMAC_TCD0_W6 = EDMAC_DLAST(0x0 not adjust DADDR upon channel completion */ Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 7 Enhanced Direct Memory Access (eDMA) Controller 77 ...
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... EDMAC_BWC(0x0) /* Bandwidth control = 0 -> No eDMA stalls */ | EDMAC_MAJOR_LINKCH(0x0)); /* Ignored, no channel linking */ Using these configurations produces the required eDMA functionality for this example. Refer to the full source code for this example in the ZIP file. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 78 Freescale Semiconductor ...
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... By default there is no need for the user to configure the FTFL. The configuration default allows for the flash memory controller (FMC) to accelerate flash transfers. For FlexMemory enabled devices, FlexNVM is configured as program/data flash and the Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 79 ...
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... FTFL module. The FCCOB requirements for execution of this command are below: Table 8-1. Program partition command FCCOB requirements FCCOB Number Kinetis Quick Reference User Guide, Rev. 0, 11/2010 80 FCCOB Contents [7:0] Table continues on the next page... 0x80 (PGMART) Not used Not used Freescale Semiconductor ...
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... FTFL_FCCOB3 = 0x00; FTFL_FCCOB4 = 0x32; FTFL_FCCOB5 = 0x08; FTFL_FSTAT = FTFL_FSTAT_CCIF_MASK; while(!(FTFL_FSTAT & FTFL_FSTAT_CCIF_MASK)) // Wait for command completion Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 8 Using the FlexMemory FCCOB Contents [7:0] Not used EEPROM data size code FlexNVM partition code ...
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... The FlexNVM partition choices affect the endurance and data retention characteristics of the device. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 82 // Selects the PGMPART command // Subsystem A and B are both Data flash size = 128 KB // Launch command sequence Freescale Semiconductor ...
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... Endurance_subsystem = (62*5000) Endurance_subsystem = 310,000 Example 2: A Kinetis device configured as in example 3 with a subsystem of 2KB of EE backed E-Flash, provides 150K cycles with 16-bit or 32-bit writes. Endurance_subsystem = ((E-Flash-2*EEESPLIT*EEESIZE)/(EEESPLIT*EEESIZE)) * Record_Efficiency*Endurance_Factor Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 8 Using the FlexMemory 83 ...
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... Using the FlexNVM Endurance_subsystem = ((64KB-2(.5)(4KB))/(.5(4KB))*.5*10,000 Endurance_subsystem = ((60KB)/2KB)*5000 Endurance_subsystem = (30*5000) Endurance_subsystem = 150000 Kinetis Quick Reference User Guide, Rev. 0, 11/2010 84 Freescale Semiconductor ...
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... CPOL=0, CPHA=0 or CPOL=1, CPHA=1 • Able to read, erase, and program on-chip flash memory • Able to reset Kinetis, allowing it to boot from flash memory after firmware updated Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Mode entered Single-chip mode Single-chip mode ...
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... Flash sector program 0x02 Flash sector erase 0xd8 Flash bulk erase 0xc7 Reset chip 0xb9 Write FCCOB registers 0xba 0xbb speed Write FlexRAM 0xbc Read FlexRAM 0xbd 0xbe NOTE Table 9-2 Address Dummy Data bytes bytes byte 8–section 1– Freescale Semiconductor ...
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... Command timing Figure 9-1 and Figure 9-2 are the command timing for the READ and FAST READ commands. Here it assumes CPOL=1 and CPHA=1. Figure 9-1. READ command timing Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 9 EzPort Module 87 ...
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... The status register can be read with the RDSR command to check reset out status and whether a write command has completed WEF 9.1.2 Configuration examples Kinetis Quick Reference User Guide, Rev. 0, 11/2010 88 Table 9-3. Ezport status register 4 3 FLEXRAM BEDIS WEN WIP Freescale Semiconductor ...
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... RSTOUT HIGH { data_in = MCF5282_GPIO_PORTQSP; } //Exiting reset and entering EZPORT mode MCF5282_GPIO_PORTQS = 0x28; // Drive RCON HIGH again Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor a single 8-bit transfer */ HIGH & RSTIN HIGH Chapter 9 EzPort Module 89 ...
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... Verify WEN flag is set ezp_rdsr_cmd(); if (sr != EP_SR_WEN) { printf("Failure in SR value: WEN not set\n"); error_count++; } //3. Sector erase ezp_se_cmd(sector_addr); //Loop till command has completed sr = EP_SR_WIP; // Poll SR until WIP goes low while ((sr & EP_SR_WIP) == EP_SR_WIP) Kinetis Quick Reference User Guide, Rev. 0, 11/2010 90 NOTE Freescale Semiconductor ...
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... EP_SR_WIP; Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Command parameter contents FCMD (code which defines the FTFL command) Flash address [23:0] Data byte [0:7] NOTE Chapter 9 EzPort Module ...
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... FAST_RDFLEXRAM, which includes the dummy byte and runs half of internal system clock frequency. Example code: ezp_wren_cmd(); ezp_wrflexram_cmd(address, buffer); //Loop till command has completed sr = EP_SR_WIP; // Poll SR until WIP goes low while ((sr & EP_SR_WIP) == EP_SR_WIP ezp_rdsr_cmd(); Kinetis Quick Reference User Guide, Rev. 0, 11/2010 92 Freescale Semiconductor ...
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... Extended address latch enables option help with glueless connections to synchronous and asynchronous memory devices. 10.1.1.2 Features 10.1.1.2.1 Signal descriptions FB_A[31:0] — non-multiplexed configuration, this is the address bus. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 93 ...
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... Address and data bus multiplexing Figure 10-1 shows the supported combinations of address and data bus widths. The bus sends the address at the first stage (light blue), and the data at the second stage (green). Kinetis Quick Reference User Guide, Rev. 0, 11/2010 94 Freescale Semiconductor ...
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... A[29:16] + AD[23: AD[15: data lines = 16 data lines = AD[31:24] Up AD[31:16 address = AD[15:0] Up to16 data lines = AD[31:16] Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 100-pin 81-pin 60-pin AD[31:24, 5 AD[19 AD[19: ad‐ ad‐ ad‐ dress dress dress data lines = data lines = ...
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... Kinetis Quick Reference User Guide, Rev. 0, 11/2010 96 100 pin 81 pin 60 pin N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 64 pin 48 pin 32 pin N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A Freescale Semiconductor ...
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... Figure 10-3. FlexBus memory range 10.1.1.2.7 Reference clock Figure 10-4 shows a high-level diagram for the FlexBus reference clock. The maximum FlexBus clock frequency in run mode MHz. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Figure 10-3 0x6000_000 - 0xA000_0000 is the Chapter 10 Flexbus Module 97 ...
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... Using the Flexbus module 10.1.1.3 Configuration examples In this example the FlexBus is connected to the MRAM memory of the TWR-MEM board. 10.1.1.3.1 Code example and explanation Figure 10-4 shows the FlexBus reference clock derived from the MCGOUTCLK. The software needs to configure a stable clock. This example configures 96 MHz of core frequency ...
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... Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor // 8-bit port // auto-acknowledge // assert chip select on second clock edge after address // 1 wait state - may need a wait state depending on the */ ...
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... Control and clock signals are routed point-to-point. • Components could and should be placed as close as possible to the MCU. • To avoid crosstalk, keep address and command signals separate (that is, a different routing layer) from the data and data strobes. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 100 Freescale Semiconductor ...
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... Table 11-1. UART instantiations on Kinetis UART instance ISO-7816 supported? UART0 Yes UART1 No UART2 - UARTn No Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor FIFOs 8 entry TxFIFO, 8 entry RxFI‐ Core Clock FO 8 entry TxFIFO, 8 entry RxFI‐ Core Clock FO No FIFOs (double buffered Peripheral Clock ...
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... Enable the clock to the selected UART */ if(uartch == UART0_BASE_PTR) SIM_SCGC4 |= SIM_SCGC4_UART0_MASK; else if (uartch == UART1_BASE_PTR) SIM_SCGC4 |= SIM_SCGC4_UART1_MASK; else if (uartch == UART2_BASE_PTR) SIM_SCGC4 |= SIM_SCGC4_UART2_MASK; else if(uartch == UART3_BASE_PTR) SIM_SCGC4 |= SIM_SCGC4_UART3_MASK; Kinetis Quick Reference User Guide, Rev. 0, 11/2010 102 NOTE NOTE Freescale Semiconductor ...
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... UARTx_C4[BRFA] field. 6. Enable the transmitter and receiver to start the UART. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 11 Universal Asynchronous Receiver and Transmitter (UART) Module UART_BDH_SBR(((ubd & 0x1F00) >> 8)); ...
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... FIFO. This approach is the most CPU intensive, but it is often the most practical approach when handling small messages. As message sizes increase it might be useful to use interrupts or the DMA to decrease the Kinetis Quick Reference User Guide, Rev. 0, 11/2010 104 Freescale Semiconductor ...
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... The diagram below shows a block diagram of the hardware connections for an RS-232 implementation. The diagram shows the optional hardware flow control signals, but only the RX and TX data connections are required. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 11 Universal Asynchronous Receiver and Transmitter (UART) Module 105 ...
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... UART RS-232 hardware implementation Figure 11-1. UART RS-232 hardware connections block diagram Kinetis Quick Reference User Guide, Rev. 0, 11/2010 106 Freescale Semiconductor ...
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... Figure 12-1. MAC-NET block diagram The MAC-NET controller has three main components: • MAC Controller—Controls the buffers and registers. Controls the MII /RMII Interface, and IEEE15888 controller. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 107 ...
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... IP, TCP, UDP, and ICMP checksum generation and checking • Configurable discard of erroneous frames • Configurable Ethernet payload alignment to allow for 32-bit word aligned header and payload processing Kinetis Quick Reference User Guide, Rev. 0, 11/2010 108 Figure 12-2. MAC-NET interfaces Freescale Semiconductor ...
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... Set ENET ready to receive Example code: /* Buffer Descriptor Format */ #ifdef ENHANCED_BD typedef struct { uint16_t status; /* control and status */ uint16_t length; /* transfer length */ uint8_t *data; /* buffer address */ uint32_t ebd_status; Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 12 ENET Module 109 ...
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... Make sure the external interface signals are enabled */ PORTB_PCR0 = PORT_PCR_MUX(4);//GPIO;//RMII0_MDIO/MII0_MDIO PORTB_PCR1 = PORT_PCR_MUX(4);//GPIO;//RMII0_MDC/MII0_MDC #if configUSE_MII_MODE PORTA_PCR14 = PORT_PCR_MUX(4);//RMII0_CRS_DV/MII0_RXDV PORTA_PCR5 = PORT_PCR_MUX(4);//RMII0_RXER/MII0_RXER PORTA_PCR12 = PORT_PCR_MUX(4);//RMII0_RXD1/MII0_RXD1 PORTA_PCR13 = PORT_PCR_MUX(4);//RMII0_RXD0/MII0_RXD0 PORTA_PCR15 = PORT_PCR_MUX(4);//RMII0_TXEN/MII0_TXEN PORTA_PCR16 = PORT_PCR_MUX(4);//RMII0_TXD0/MII0_TXD0 PORTA_PCR17 = PORT_PCR_MUX(4);//RMII0_TXD1/MII0_TXD1 Kinetis Quick Reference User Guide, Rev. 0, 11/2010 110 Freescale Semiconductor ...
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... ENET_RCR = ENET_RCR_MAX_FL(configENET_RX_BUFFER_SIZE) | ENET_RCR_MII_MODE_MASK | ENET_RCR_CRCFWD_MASK | ENET_RCR_RMII_MODE_MASK; #endif /*FSL: clear rx/tx control registers*/ ENET_TCR = 0; /* Setup half or full duplex. */ if( usData & PHY_DUPLEX_STATUS ) { /*Full duplex*/ ENET_RCR &= (unsigned portLONG)~ENET_RCR_DRT_MASK; ENET_TCR |= ENET_TCR_FDEN_MASK; Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 12 ENET Module 111 ...
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... NBUF * ) pcBufPointer; pcBufPointer = &( xENETRxDescriptors_unaligned while unsigned long ) pcBufPointer & 0x0fUL ) != pcBufPointer++; } Kinetis Quick Reference User Guide, Rev. 0, 11/2010 112 Freescale Semiconductor ...
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... PHY management interface The PHY management interface is the path to communicate to the PHY control/status registers which describes the network. Communication between the MAC-NET and the PHY is made by 2 signals: Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 12 ENET Module 113 ...
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... Clear the MII interrupt bit */ ENET_EIR/*(ch)*/ = ENET_EIR_MII_MASK; /* Initiatate the MII Management write */ ENET_MMFR/*(ch)*/ = 0 | ENET_MMFR_ST(0x01) | ENET_MMFR_OP(0x01) | ENET_MMFR_PA(phy_addr) | ENET_MMFR_RA(reg_addr) | ENET_MMFR_TA(0x02) | ENET_MMFR_DATA(data); Kinetis Quick Reference User Guide, Rev. 0, 11/2010 114 Freescale Semiconductor ...
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... The media independent interface (MII configuration mode that requires 18 signals to communicate to a generic PHY. The MII operates at 25 MHz. The synchronization signals are part of the MII external signals provided by the Ethernet PHY. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 12 ENET Module 115 ...
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... In MII mode, Rx and Tx are synchronous to MII0_RXCLK and MII0_TXCLK respectively. There is no additional requirement from the MAC-NET to synch from the PHY to the MII/RMII interface. The PHY data sheet must be followed for all electrical requirements. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 116 Freescale Semiconductor ...
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... PHY clock output if provided 12.5.1 Code example and explanation The following example code shows the registers needed to configure the MAC-NET controller in RMII mode. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Figure 12-3. MII connection NOTE NOTE Chapter 12 ENET Module ...
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... RMII0_CRS_DV signal is connected to the RXDV/CRSDV pin. Figure 12-4. RMII mode connection example 1 The RMII0_RCR_DV is connected to the CRS/CRSDV. Hardware designs need to be taken into consideration depending on the specific PHY used. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 118 Freescale Semiconductor ...
Page 119
... PHY. 12.6.1.1 General Routing and Placement Use the following general routing and placement guidelines when laying out a new design for the ENET. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor NOTE Chapter 12 ENET Module 119 ...
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... EXTAL pin, or data corruption occurs. Some PHYs output a 50 MHz clock which must be used for the MCU EXTAL pin. Follow your PHY specifications and considerations for the RMII mode. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 120 Freescale Semiconductor ...
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... The main features of the DCD module are the following: • USB battery charger specification compliant (rev 1.1) • Programmable timing parameters Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 121 ...
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... In other words, the amount of current that the device is able to draw to charge the system batteries depends on the type of downstream port it is connected to. 13.2 Module Configuration 13.2.1 Module dependencies The DCD module depends on other modules to operate correctly: Clock Source Kinetis Quick Reference User Guide, Rev. 0, 11/2010 122 Freescale Semiconductor ...
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... Remember that the Kinetis family has 5 V tolerant pins, meaning that there is no need to add a level shifter or resistor divider to sense the VBUS line. Figure 13-1. DCD hardware diagram Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 13 USB Device Charger Detection (USBDCD) Module 123 ...
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... USB, and I/O pins to run the DCD example. 1. First, configure one I/O pin as input. In this example PTB0 is used for the VBUS detection. FLAG_SET(SIM_SCGC5_PORTB_SHIFT,SIM_SCGC5);// Enable clock for PTB PORTB_PCR0=(0|PORT_PCR_MUX(1));// configure PTB0 as I/O pin Kinetis Quick Reference User Guide, Rev. 0, 11/2010 124 Figure 13-2. DCD demo results Freescale Semiconductor ...
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... USBDCD_STATUS_SEQ_RES_MASK)>>16); u8ChargerType|= (UINT8)((USBDCD_STATUS & USBDCD_STATUS_FLAGS_MASK)>>16); return(u8ChargerType); } The DCD interrupt service routine: Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 13 USB Device Charger Detection (USBDCD) Module // USB Clock Gating // USB Clock Gating | USBDCD_CONTROL_IACK_MASK; 125 ...
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... Example code void DCD_ISR(void) { USBDCD_CONTROL|= USBDCD_CONTROL_IACK_MASK; if((USBDCD_STATUS&0x000C0000) == 0x00080000) FLAG_SET(USBOTG_CONTROL_DPPULLUPNONOTG_SHIFT,USBOTG_CONTROL); // enable pullup if((!(USBDCD_STATUS & 0x00400000)) || (USBDCD_STATUS & 0x00300000)) FLAG_SET(DCD_Flag,gu8InterruptFlags); } Kinetis Quick Reference User Guide, Rev. 0, 11/2010 126 // ackowledge // charger detection completed Freescale Semiconductor ...
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... VBUS voltage. The DCD was designed to run together with this USB mode. First, the DCD detects the host type and after the USB takes the control of the D+ and D- signals. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 127 ...
Page 128
... You can select which regulator will be used by using the standby bit in the system integration module. The input pin for the regulator is called VREGIN and the output pin is VOUT33. Run Mode Kinetis Quick Reference User Guide, Rev. 0, 11/2010 128 Figure 14-1. USB device mode Figure 14-2. USB host mode Freescale Semiconductor ...
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... When the input power supply is below 3.6 V, the regulator goes to pass-through mode. The following figure shows the ideal relation between the regulator output and input power supply. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 14 Universal Serial Bus OTG Module Figure 14-4. Regulator output 129 ...
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... Device Mode Initialization In device mode the USB module activates the pullup resistor after initialization is complete detected by the remote host. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 130 Figure 14-5. USB clock diagram Freescale Semiconductor ...
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... USB module. When a pullup is detected in the signal, the module generates the attached interrupt, which indicates that one device is attached to the bus and the enumeration process must start. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 14 Universal Serial Bus OTG Module 131 ...
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... The mini-A plug, which indicates that this part is a host, has the ID pin grounded, while the ID in the mini-B plug is floating, indicating that this part will act as a device. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 132 Freescale Semiconductor ...
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... V coming from the host). In both cases, the USB regulator must be enabled to supply the USB transceiver. Also, the ID line is not needed in this scenario. Dual Role Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 14 Universal Serial Bus OTG Module Figure 14-8. Host only diagram Figure 14-9. Device only diagram ...
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... The 33 Ω series termination resistors are recommended for the FS and LS USB transceiver. These series termination resistors must be placed as close as possible to the transceiver to maximize the eye diagram for the data lines. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 134 Figure 14-10. Dual role diagram Freescale Semiconductor ...
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... Minimize vias and corners. • Route differential pairs on a signal layer, next to the ground plane. • Avoid signal stubs Figure 14-12. USB layout recommendations Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 14 Universal Serial Bus OTG Module 135 ...
Page 136
... Then open HyperTerminal pointing to the COMx device (in this case COM4) with 8-bit size, 1 stop bit, no flow control, 9600 baudrate, and begin typing in the terminal. The software running in the MCU returns the same characters. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 136 Freescale Semiconductor ...
Page 137
... Make sure that the jumper configuration is appropriate to supply 5 V through the USB port. 4. Run the application. The application will send a message that it is waiting for an HID USB mouse to be attached. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 14 Universal Serial Bus OTG Module 137 ...
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... Figure 14-16. USB mouse successfully enumerated Finally, move the mouse (or other pointing device) or press any button, and the status will be displayed in the terminal screen. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 138 Freescale Semiconductor ...
Page 139
... Documentation and API information is available on the Freescale website. the stack is free and is MQX (Freescale Real time operating system) compatible. For more information regarding this demo, please visit: www.freescale.com/medicalusb . Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 14 Universal Serial Bus OTG Module Figure 14-17. Mouse events 139 ...
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... Example code Kinetis Quick Reference User Guide, Rev. 0, 11/2010 140 Freescale Semiconductor ...
Page 141
... Flexible transmit priority scheme • Global timer synchronization • Rich error indication • Different low power modes • Remote wakeup capability It enables real-time communication over the CAN bus while minimizing processor intervention. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 141 ...
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... HyperTerminal. The CAN loop-back node by default is the local node itself and can be configured as the remote node via macros. The CAN bit rate is 83.33k by default. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 142 Freescale Semiconductor ...
Page 143
... Enable clocks to all ports for pin muxing configuration later SIM_SCGC5 |= (SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTB_MASK | SIM_SCGC5_PORTC_MASK | SIM_SCGC5_PORTD_MASK | SIM_SCGC5_PORTE_MASK ); if(isCAN0) { SIM_SCGC6 |= SIM_SCGC6_FLEXCAN0_MASK; } else { SIM_SCGC3 |= SIM_SCGC3_FLEXCAN1_MASK; } Configure NVIC to enable corresponding interrupts for FlexCAN: Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 15 FlexCAN Module 143 ...
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... Initialize the Rx Individual Mask Registers (RXIMRn) if individual Rx masking and queue is enabled (MCR[IRMQ]=1). Kinetis Quick Reference User Guide, Rev. 0, 11/2010 144 | (0x07<<29); | (0x1F); & ~(0xFF<<5)) | (0xFF<<5); // Clear any pending // Enable interrupts // Clear any pending // Enable interrupts // Clear any pending // Enable PORTE_PCR25 = Freescale Semiconductor ...
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... Follow 4 steps for Transmit Process pFlexCANReg->MB[iTxMBNo].CS = FLEXCAN_MB_CS_CODE(FLEXCAN_MB_CODE_TX_INACTIVE) // write inactive code | (wno<<FLEXCAN_MB_CS_IDE_BIT_NO) | (bno<<FLEXCAN_MB_CS_RTR_BIT_NO) ; pFlexCANReg->MB[iTxMBNo].ID = (prio << FLEXCAN_MB_ID_PRIO_BIT_NO) | ((msgID & ~(CAN_MSG_IDE_MASK|CAN_MSG_TYPE_MASK))<<i); pFlexCANReg->MB[iTxMBNo].WORD0 = word[0]; Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 15 FlexCAN Module 145 ...
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... FLEXCAN_MB_CS_RTR)? 1:0; if(format) { *id |= CAN_MSG_TYPE_MASK Read message bytes wno = (length-1)>>2; bno = length-1; if(wno> (*(uint32*)pBytes) = pFlexCANReg->MB[iMB].WORD0; swap_4bytes(pBytes); bno -= 4; pMBData = (uint8*)&pFlexCANReg->MB[iMB].WORD1+3; } Kinetis Quick Reference User Guide, Rev. 0, 11/2010 146 // flag extended ID // flag Remote Frame type Freescale Semiconductor ...
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... Format A with extended ID *pIDTabElement = (id<< single ID acceptance codes } else { // Format A with standard ID *pIDTabElement = (id<<19) // acceptance codes Example code for configuring ID table in Format B: Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor (bIsExtID<<30) | (bIsRTR<<31); | (bIsRTR<<31); // single ID Chapter 15 FlexCAN Module // 147 ...
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... RXIDC_1 .. RXIDC_3 j++; i++; } Else { break; } }while(j<3); Kinetis Quick Reference User Guide, Rev. 0, 11/2010 148 // RXIDB_0 // RXIDB_1 CAN_MSG_IDE_MASK)>>CAN_MSG_IDE_BIT_NO; CAN_MSG_TYPE_MASK)>>CAN_MSG_TYPE_BIT_NO; Freescale Semiconductor ...
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... LCD panel. A reference capacitance must be determined when the LCD is operating correctly and stored in the memory. While the product is operating, the capacitance can be compared periodically to verify if there’s an open connection, short circuit substantial change in the reference capacitance that indicates a fault. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 149 ...
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... This configuration is not suitable for 5 V LCD Requires an external power supply, and it must be a variable. Contrast control is re‐ quired. Not suitable for 5 V LCD VDD voltage must appropriate range for LCD VDD voltage must appropriate range for LCD Freescale Semiconductor ...
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... Clock source The SLCD module supports four different clock sources. See the 16-1Figure 16-1 below. Figure 16-1. SLCD clock source options on the K40 family Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 16 Segment LCD Controller NOTE Table 16-2 and Figure ...
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... Crystal must be in the 32 KHz range. The system oscillator drives a 32 kHz clock to the SLCD, TSI, and LPT. RTC oscillator drives a 32 kHz clock to the SLCD, TSI, and LPT. See RTC Os‐ cillator Chapter and the RTC Clock Module. Freescale Semiconductor ...
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... After RESET these register are configured as 0 but indicated here for reference PORTB_PCR0 = PORT_PCR_MUX(0); PORTB_PCR1 = PORT_PCR_MUX(0); PORTB_PCR2 = PORT_PCR_MUX(0); // Complete for all used pins Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 16 Segment LCD Controller - Set mux to LCD analog operation. //LCD_P0 //LCD_P1 //LCD_P2 ...
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... LCD segment feature (fault detection), select the clock source for the module, work on LCD low power modes, change the frequency of operation, and so on. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 154 SLCD interrupt vector = 102 //0-15 //0-3 //0-3 //0-3 //0-3 //0-3 0-7 Front Plane information Freescale Semiconductor ...
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... The segment LCD included in the TWRPI-SLCD has 3–7 segment characters, 7 special symbols, and uses 4 backplanes and 7 frontplanes. To use this demo the TWR must be connected to a serial port with a terminal program configured to 115200,n,8,1. Commands are ASCII characters. The following table shows the commands and syntax. ...
Page 156
... Syntax <cmd> on/off/alt/norm <val> 0–6 <val> 0–3 <val> 0–7 (resulting frequen‐ cy must be in 28–58 Hz range) <val> <val> 0 Run, 1 wait, 2 stop <val> 0=System Osc, 1=Def. RTC, 2 =ALT Int(32kHz), 3= Int(2MHz) <mode> VLL1_VIREG_HREF0, VLL1_VIREG_HREF1, VLL3_VDD, VLL3_EXT_CP, VLL3_EXT_BR, VLL2_VDD <> Freescale Semiconductor ...
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... The sensor (in this case, the TSI module) uses a capacitive sensing method to measure changes in the electrode capacitance. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 157 ...
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... This creates a triangular wave. This wave has a configurable peak to peak voltage or delta voltage. Observe It shows the electrode current source oscillator structure. Figure 17-2. TSI Electrode current source oscillator Kinetis Quick Reference User Guide, Rev. 0, 11/2010 158 Figure 17-2. Freescale Semiconductor ...
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... Capacitive touch sensing detection across all low power modes • Automatic periodic scan or software triggered single scan. • Low power mode current adder can be <1uA. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 17 Touch Sense Input (TSI) Module Figure 159 ...
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... Continuous active mode • All enabled electrodes are scanned continuously • Scanning period is determined by SMOD register • Ideal for scanning once the application is in run mode • Software triggered active mode Kinetis Quick Reference User Guide, Rev. 0, 11/2010 160 NOTE . Freescale Semiconductor ...
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... TSI channel 5 is shared with PORTA 4. This pin does not have the TSI as a primary function necessary to change the pin function to Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 17 Touch Sense Input (TSI) Module //Enable ALT0 for portA4 ...
Page 162
... Baseline is not tracked but measured initially and assumed to be constant. Baseline tracking is critical in applications where the environment is susceptible to change. Because this example is intended to be simple, baseline tracking has not been implemented. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 162 Freescale Semiconductor ...
Page 163
... GPIO pins can be used to provide even more touch sensors. For more info on the TSS library and downloads visit www.freescale.com/touchsensing. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 17 Touch Sense Input (TSI) Module Enable end of scan interrupt ...
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... LED. The DBOUNCE_COUNTS macro can be found in the TSI.h file. This value Kinetis Quick Reference User Guide, Rev. 0, 11/2010 164 the next step is to detect touches. As can be Figure 17-6 Initialize debounce counter Next electrode shows a flow Freescale Semiconductor ...
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... For further information on designing electrodes and in-depth considerations on hardware and electrode design, search for application notes Designing Touch Sensing Electrodes (document AN3863) at www.freescale.com/touchsensing Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor Chapter 17 Touch Sense Input (TSI) Module Figure 17-7. 165 ...
Page 166
... Because the area is smaller, it will not increase the base capacitance as much as a continuous plane and thus does not affect sensitivity as much. Figure 17-8. Recommended x-hatch ground plane pattern Kinetis Quick Reference User Guide, Rev. 0, 11/2010 166 Figure 17-8. The x-hatch pattern helps with filtering Freescale Semiconductor ...
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... Scheduling the ADC conversions at a time after the transient effects of the last control change has been made can enable smooth operation of control loops. The PDB allows simple scheduling of one or both of the ADC peripherals conversions. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 167 ...
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... C code, with no looping. This filter is optional and can be used with or without the averaging feature of the ADC itself. In the example, both are used for increased smoothness of result. • Hardware triggering of the ADC with the PDB: Kinetis Quick Reference User Guide, Rev. 0, 11/2010 168 Freescale Semiconductor ...
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... Configure System Integration Module for defaults as far as ADC. 3. Configure the Peripheral Delay Block (PDB). 4. Determine the configuration the ADC using a structure to store the desired configuration. 5. Use the ADC driver to send the desired configuration to the ADC’s. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 169 ...
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... ADCs // Continuous, rather than one-shot, mode // PDB enabled // PDB Interrupt Enable // Slow down the period of the PDB for testing // Trigger source is Software Trigger to be invoked in // Multiplication factor 20 for the prescale divider for // the software trigger, PDB_SC_SWTRIG_MASK is not Freescale Semiconductor ...
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... PGALP_NORMAL | ADC_PGA_PGAG(PGAG_64); Master_Adc_Config.STATUS1A = AIEN_OFF | DIFF_SINGLE | ADC_SC1_ADCH(31); Master_Adc_Config.STATUS1B = AIEN_OFF | DIFF_SINGLE | ADC_SC1_ADCH(31); Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor // Continuous, rather than one-shot, mode // PDB enabled // PDB Interrupt Enable // Slow down the period of the PDB for testing // Trigger source is Software Trigger to be invoked in ...
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... In case previous demo did not end with interrupts enabled, enable used ones. EnableInterrupts ; Kinetis Quick Reference User Guide, Rev. 0, 11/2010 172 // config ADC // do the calibration // config ADC // do the calibration Freescale Semiconductor ...
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... Spikes are attenuated 6dB, 12dB, 18dB, .. and so on until they die out. // End exponential filter code.. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor // kick off the PDB - just once // do this asap // this will clear the COCO bit that is also the interrupt add f*sample, divide by (f+1) ...
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... Provide very stable analog ground and voltage planes, both for analog power and voltage references if full accuracy of the ADC is required. 3. Provide very stable analog ground and voltage planes, both for analog power and voltage references if full accuracy of the ADC is required. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 174 Freescale Semiconductor ...
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... ESD/EMI considerations The RC filter used for anti-aliasing is all that is required to enhance ESD protection. EMI interference is also dealt with by the same inexpensive filter. Minimizing loop area for any RF ranged signals is also essential. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 Freescale Semiconductor 175 ...
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... Layout guidelines Kinetis Quick Reference User Guide, Rev. 0, 11/2010 176 Freescale Semiconductor ...
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... Then attach the other elevator board onto the other side of the modules. The TWR-ELEV box will also have instructions for putting together the tower. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 ...
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... Terminal configuration Finally connect a USB cable to the mini-USB port on the Kinetis tower module. This will be J16 on TWR-K40X256 and J13 on TWR-K60N512. When you plug-in the USB cable to your board, you should see some LED’s on all the tower boards turn on. This will let you know your tower was put together correctly ...
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... The workspace that opens up contains a “Hello World” project for both TWR- K40X256 and TWR-K60N512. 4. There are many different RAM and flash combinations available in the Kinetis family which this project supports. However, for the processor on your tower board you should choose one of the targets below to maximize the memory space that the linker makes available for your chip ...
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... Hit the Break button to pause the debugger. You can then step line by line via the Step Over button, and dive into function calls with the Step Into button. 14. Hit the Stop button to end the debugging session. Kinetis Quick Reference User Guide, Rev. 0, 11/2010 180 Freescale Semiconductor ...
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... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...