TWR-K60N512-KEIL Freescale Semiconductor, TWR-K60N512-KEIL Datasheet - Page 22

• Manufacturer Part Number: TWR-K60N512-KEIL
• Description: K60N512 Keil Tower Kit
• Manufacturer: Freescale Semiconductor
• Series: Kinetisr
• Type: MCUr

Specifications of TWR-K60N512-KEIL

• Rohs Compliant: YES
• Contents: 4 Boards, Documentation, DVD
• Peak Reflow Compatible (260 C): Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: Freescale Tower System, K60N512

PCB routing considerations
Power supply bypass capacitors must be placed close to the MCU supply pins. The basic
concept is that the bypass capacitor provides the instantaneous current for every logic
transition within the MCU. Fortunately, each Kinetis MCU has a low voltage internal
regulator for the MCU core logic, so the abrupt current demands of the internal high
speed logic are not as critical. However, external signals demand energy from the power
rails when they transition from one logic level to the other. The bypass capacitors provide
the local filtering so that the effects of the external pin transitions are not reflected back
to the power supply, which causes RF emissions.
The basic rule of placing bypass capacitors as close as possible to the MCU is still
appropriate. The idea is to minimize the loop created by the capacitor between the VDD
and VSS pins. The implementation of this rule depends on the number of mounting
layers, how the supplies are routed, and the physical size of the capacitors:
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• Number of mounting layers – PCBs with components mounted on the top side only
• Supply routing – With the Ball Grid Array (BGA) package, all of the VDD/VSS
will have a significant limitation on how close the bypass caps can be located due to
the number of components that require space. PCBs that have components mounted
on both sides of the PCB allow closer placement of the bypass capacitors.
pairs are routed to other layers under the package. This allows easier attachment of
the VDD and VSS pins to the power and ground planes within those layers. The
bypass capacitors can be placed in the area below the MCU, with connections very
close to the power pins. See
Kinetis Quick Reference User Guide, Rev. 0, 11/2010
Figure
2-2.
Freescale Semiconductor