WG82574L S LBA8 Intel, WG82574L S LBA8 Datasheet - Page 374

• Manufacturer Part Number: WG82574L S LBA8
• Manufacturer: Intel

Specifications of WG82574L S LBA8

• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / RoHS Status: Compliant

10.2.11.1
374
Control Register (Any Page), PHY Address 01; Register 0
15
14
13
12
Bits
Reset
Loopback
Speed
Select (LSB)
Auto-
Negotiation
Enable
Field
R/W, SC
R/W
R/W
R/W
Mode
0x0
0x0
0x0
0x1
HW Rst
SC
0x0
Update
Update
SW Rst
82574 GbE Controller—Driver Programing Interface
PHY Software Reset.
Writing a 1b to this bit causes the PHY state
machines to be reset. When the reset operation
completes, this bit is automatically cleared to 0b.
The reset occurs immediately.
1b = PHY reset.
0b = Normal operation.
When loopback is activated, the transmitter data
presented on TXD is looped back to RXD internally.
The link is broken when loopback is enabled.
Loopback speed is determined by registers
21_2.2:0.
1b = Enable loopback.
0b = Disable loopback.
Changes to this bit are disruptive to the normal
operation; therefore, any changes to these
registers must be followed by a software reset to
take effect. A write to this register bit does not
take effect until any one of the following also
occurs:
11b = Reserved.
10b = 1000 Mb/s.
01b = 100 Mb/s.
00b = 10 Mb/s.
Changes to this bit are disruptive to the normal
operation. A write to this register bit does not take
effect until any one of the following occurs:
If register 0.12 is set to 0b and speed is manually
forced to 1000 Mb/s in registers 0.13 and 0.6, then
auto- negotiation is still enabled and only
1000BASE-T full-duplex is advertised if register 0.8
is set to 1b, and 1000BASE-T half-duplex is
advertised if register 0.8 is set to 0b. Registers
4.8:5 and 9.9:8 are ignored. Auto-negotiation is
mandatory per IEEE for proper operation in
1000BASE-T.
1b = Enable auto-negotiation process.
0b = Disable auto-negotiation process.
• Software reset is asserted (register 0.15).
• Restart auto-negotiation is asserted (register
• Power down (register 0.11, 16_0.2) transitions
• Software reset is asserted (register 0.15).
• Restart auto-negotiation is asserted (register
• Power down (register 0.11, 16_0.2) transitions
0.9).
from power down to normal operation (bit 6,
13).
0.9).
from power down to normal operation.
Description