WG82574L S LBA8 Intel, WG82574L S LBA8 Datasheet - Page 270

• Manufacturer Part Number: WG82574L S LBA8
• Manufacturer: Intel

Specifications of WG82574L S LBA8

• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / RoHS Status: Compliant

9.1.6.2.1.8
9.1.6.2.2
Table 75.
9.1.6.2.2.1
Figure 58.
270
Header Log, Offset 0x1C
The header log register captures the header for the transaction that generated an error.
This register is 16 bytes.
Device Serial Number Capability
The PCIe device serial number capability is an optional extended capability that can be
implemented by any PCIe device. The device serial number is a read-only 64-bit value
that is unique for a given PCIe device.
All multi-function devices that implement this capability must implement it for function
0; other functions that implement this capability must return the same device serial
number value as that reported by function 0. The 82574 is not a multi-function device.
PCIe Device Serial Number Capability Structure
Device Serial Number Enhanced Capability Header (Offset 0x00)
Figure 58
capability header. The Table below provides the respective bit definitions. The Extended
Capability ID for the Device Serial Number Capability is 0003h.
Allocation of Register Fields in the Device Serial Number Enhanced Capability
Header
127:0
15:0
19:16
31:20
Bit Location
31
PCIe Enhanced Capability Header
Serial Number Register (Lower DW)
Serial Number Register (Upper DW)
31
Next Capability Offset
Location
Bit(s)
details the allocation of register fields in the device serial number enhanced
RO
RO
RO
Attributes
RO
Attribute
20
19
Capability Version
PCIe Extended Capability ID
This field is a PCI-SIG defined ID number that indicates the nature and format of
the extended capability.
Extended Capability ID for the Device Serial Number Capability is 0x0003.
Capability Version
This field is a PCI-SIG defined version number that indicates the version of the
capability structure present.
Must be 0x1 for this version of the specification.
Next Capability Offset
This field contains the offset to the next PCIe capability structure or 0x000 if no
other items exist in the linked list of capabilities.
For extended capabilities implemented in device configuration space, this offset is
relative to the beginning of PCI compatible configuration space and thus must
always be either 0x000 (for terminating list of capabilities) or greater than 0x0FF.
0x0
Default Value
16
Header of the defective packet (TLP or DLLP).
0
15
PCI Express Extended Capability ID
82574 GbE Controller—Programing Interface
Description
Description
0