WG82574L S LBA8 Intel, WG82574L S LBA8 Datasheet - Page 312
WG82574L S LBA8
Manufacturer Part Number
WG82574L S LBA8
Description
Manufacturer
Intel
Datasheet
1.WG82574L_S_LBA8.pdf
(472 pages)
Specifications of WG82574L S LBA8
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Compliant
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10.2.4.2
10.2.4.3
312
Interrupt Throttling Register - ITR (0x000C4; R/W)
Software can use this register to prevent the condition of repeated, closely spaced,
interrupts to the host CPU, asserted by the 82574, by guaranteeing a minimum delay
between successive interrupts.
To independently validate configuration settings, software can use the following
algorithm to convert the inter-interrupt interval value to the common interrupts/sec
performance metric:
interrupts/sec = (256 x 10
For example, if the interval is programmed to 500 (decimal), the 82574 guarantees the
CPU is not interrupted by it for 128 s from the last interrupt. The maximum observable
interrupt rate from the 82574 should never exceed 7813 interrupts/sec.
Inversely, inter-interrupt interval value can be calculated as:
inter-interrupt interval = (256 x 10
The optimal performance setting for this register is very system and configuration
specific. An initial suggested range is 651- 5580 decimal (or 0x28B - 0x15CC).
Extended Interrupt Throttle - EITR (0x000E8 + 4 *n[n = 0..4]; R/W)
Each EITR is responsible for an MSI-X interrupt cause. The allocation of EITR-to-
interrupt cause is through the IVAR registers.
Software can use this register to prevent the condition of repeated, closely spaced,
interrupts to the host CPU, asserted by the network controller, by guaranteeing a
minimum delay between successive interrupts.
INTERVAL
Reserved
INTERVAL
Reserved
Field
Field
15:0
31:16
15:0
31:16
Bit(s)
Bit(s)
0x0
0x0
0x0
0x0
Initial
Initial
Value
Value
-9
sec x interval)-1
Minimum Inter-Interrupt Intervall
The interval is specified in 256 ns increments. Zero disables interrupt
throttling logic.
Reserved
Should be written with 0x0 to ensure future compatibility.
Minimum Inter-Interrupt Interval
The interval is specified in 256 ns increments. Zero disables interrupt
throttling logic.
Reserved
Should be written with 0x0 to ensure future compatibility.
-9
sec x interrupts/sec) -1
82574 GbE Controller—Driver Programing Interface
Description
Description
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