WG82574L S LBA8 Intel, WG82574L S LBA8 Datasheet - Page 327

• Manufacturer Part Number: WG82574L S LBA8
• Manufacturer: Intel

Specifications of WG82574L S LBA8

• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / RoHS Status: Compliant

Driver Programing Interface—82574 GbE Controller
Note:
PCSD: The Packet Checksum and IP Identification fields are mutually exclusive with the
RSS hash. Only one of the two options is reported in the Rx descriptor. The
RXCSUM.PCSD affect is listed as follows:
PCSS IPPCSE: The PCSS and the IPPCSE control the packet checksum calculation. As
previously stated, the packet checksum shares the same location as the RSS field. The
packet checksum is reported in the receive descriptor when the RXCSUM.PCSD bit is
cleared.
If RXCSUM.IPPCSE cleared (the default value), the checksum calculation that is
reported in the Rx Packet Checksum field is the unadjusted 16-bit ones complement of
the packet. The Packet Checksum starts from the byte indicated by RXCSUM.PCSS
(zero corresponds to the first byte of the packet), after VLAN stripping if enabled by the
CTRL.VME. For example, for an Ethernet II frame encapsulated as an 802.3ac VLAN
packet and with RXCSUM.PCSS set to 14, the packet checksum would include the entire
encapsulated frame, excluding the 14-byte Ethernet header (DA, SA, Type/Length) and
the 4-byte VLAN tag. The Packet Checksum does not include the Ethernet CRC if the
RCTL.SECRC bit is set. Software must make the required offsetting computation (to
back out the bytes that should not have been included and to include the pseudo-
header) prior to comparing the Packet Checksum against the TCP checksum stored in
the packet.
If RXCSUM.IPPCSE is set, the Packet Checksum is aimed to accelerate checksum
calculation of fragmented UDP packets.
The PCSS value should not exceed a pointer to IP header start or else it will erroneously
calculate IP header checksum or TCP/UDP checksum.
RXCSUM.IPOFLD is used to enable the IP Checksum offloading feature. If
RXCSUM.IPOFLD is set to one, the 82574 calculates the IP checksum and indicates a
pass/fail indication to software via the IP Checksum Error bit (IPE) in the Error field of
the receive descriptor. Similarly, if RXCSUM.TUOFLD is set to one, the 82574 calculates
the TCP or UDP checksum and indicates a pass/fail indication to software via the TCP/
UDP Checksum Error bit (TCPE). Similarly, if RFCTL.IPv6_DIS and RFCTL.IP6Xsum_DIS
are cleared to zero and RXCSUM.TUOFLD is set to one, the 82574 calculates the TCP or
UDP checksum for IPv6 packets. It then indicates a pass/fail condition in the TCP/UDP
Checksum Error bit (RDESC.TCPE).
This applies to checksum offloading only. Supported frame types:
RXCSUM.CRCOFL is used to enable the CRC32 checksum offloading feature. If
RXCSUM.CRCOFL is set to one, the 82574 calculates the CRC32 checksum and
indicates a pass/fail indication to software via the CRC32 Checksum Error bit (CRCE) in
the Error field of the receive descriptor.
This register should only be initialized (written) when the receiver is not enabled (for
example, only write this register when RCTL.EN = 0b).
Legacy Rx Descriptor
(RCTL.DTYP = 00b)
Extended or Header Split Rx
Descriptor
(RCTL.DTYP = 01b)
• Ethernet II
• Ethernet SNAP
RXCSUM.PCSD
Packet checksum is reported in the
Rx Descriptor
Packet checksum and IP
identification are reported in the Rx
Descriptor
0b (Checksum Enable)
Unsupported configuration.
RSS Hash value is reported in the
Rx descriptor.
1b (Checksum Disable)
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