WG82574L S LBA8 Intel, WG82574L S LBA8 Datasheet - Page 371

• Manufacturer Part Number: WG82574L S LBA8
• Manufacturer: Intel

Specifications of WG82574L S LBA8

• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Lead Free Status / RoHS Status: Compliant

Driver Programing Interface—82574 GbE Controller
10.2.10.1
10.2.10.2
10.2.10.3
10.2.10.4
MSI—X Table Entry Lower Address - MSIXTADD (BAR3: 0x0000 +
n*0x10 [n=0..4]; R/W)
MSI—X Table Entry Upper Address - MSIXTUADD (BAR3: 0x0004 +
n*0x10 [n=0..4]; R/W)
MSI—X Table Entry Message - MSIXTMSG (BAR3: 0x0008 + n*0x10
[n=0..4]; R/W)
MSI—X Table Entry Vector Control - MSIXTVCTRL (BAR3: 0x000C +
n*0x10 [n=0..4]; R/W)
Message
Address LSB
(RO)
Message
Address
Message
Address
Message Data
Mask
Reserved
Field
Field
Field
Field
1:0
31:2
31:0
31:0
0
31:1
Bit(s)
Bit(s)
Bit(s)
Bit(s)
0x0
0x0
0x0
0x0
1b
0x0
Initial
Initial
Initial
Initial
Value
Value
Value
Value
For proper Dword alignment, software must always write 0b’s to these
two bits. Otherwise, the result is undefined.
System-Specific Message Lower Address
For MSI-X messages, the contents of this field from an MSI-X table
entry specifies the lower portion of the Dword-aligned address for the
memory write transaction.
System-Specific Message Upper Address
System-Specific Message Data
For MSI-X messages, the contents of this field from an MSI-X table
entry specifies the data written during the memory write transaction.
In contrast to message data used for MSI messages, the low-order
message data bits in MSI-X messages are not modified by the
function.
When this bit is set, the function is prohibited from sending a
message using this MSI-X table entry. However, any other MSI-X table
entries programmed with the same vector are still capable of sending
an equivalent message unless they are also masked.
Reserved
Description
Description
Description
Description
371