MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 949

• Manufacturer Part Number: MC9S12XDP512CAL
• Manufacturer: Freescale

Specifications of MC9S12XDP512CAL

• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 32KB
• # I/os (max): 91
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 2(16-chx10-bit)
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 112
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

PIEH[7:0]
PIFH[7:0]
Reset
Field
23.0.5.53 Port H Interrupt Flag Register (PIFH)
Read: Anytime.
Write: Anytime.
Each flag is set by an active edge on the associated input pin. This could be a rising or a falling
edge based on the state of the PPSH register. To clear this flag, write logic level “1” to the
corresponding bit in the PIFH register. Writing a “0” has no effect.
Field
7–0
7–0
W
R
PIFH7
Interrupt Enable Port H
0 Interrupt is disabled (interrupt flag masked).
1 Interrupt is enabled.
Interrupt Flags Port H
0 No active edge pending. Writing a “0” has no effect.
1 Active edge on the associated bit has occurred (an interrupt will occur if the associated enable bit is set).
7
0
Writing a logic level “1” clears the associated flag.
PIFH6
0
6
Figure 23-55. Port H Interrupt Flag Register (PIFH)
Table 23-49. PIEH Field Descriptions
Table 23-50. PIFH Field Descriptions
PIFH5
5
0
PIFH4
0
4
Description
Description
PIFH3
3
0
PIFH2
0
2
PIFH1
1
0
PIFH0
0
0