MC9S12XDP512CAL Freescale, MC9S12XDP512CAL Datasheet - Page 55

MC9S12XDP512CAL

Manufacturer Part Number
MC9S12XDP512CAL
Description
Manufacturer
Freescale
Datasheet

Specifications of MC9S12XDP512CAL

Cpu Family
HCS12
Device Core Size
16b
Frequency (max)
40MHz
Interface Type
CAN/I2C/SCI/SPI
Total Internal Ram Size
32KB
# I/os (max)
91
Number Of Timers - General Purpose
12
Operating Supply Voltage (typ)
2.5/5V
Operating Supply Voltage (max)
2.75/5.5V
Operating Supply Voltage (min)
2.35/3.15V
On-chip Adc
2(16-chx10-bit)
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
112
Package Type
LQFP
Program Memory Type
Flash
Program Memory Size
512KB
Lead Free Status / RoHS Status
Compliant

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1.2.3
1.2.3.1
EXTAL and XTAL are the crystal driver and external clock pins. On reset all the device clocks are derived
from the EXTAL input frequency. XTAL is the crystal output.
1.2.3.2
The RESET pin is an active low bidirectional control signal. It acts as an input to initialize the MCU to a
known start-up state. As an output it is driven ;ow to indicate when any internal MCU reset source triggers.
The RESET pin has an internal pullup device.
Freescale Semiconductor
Function 1
PT[7:0]
Name
PS5
PS4
PS3
PS2
PS1
PS0
Pin
Function 2
Detailed Signal Descriptions
IOC[7:0]
MOSI0
MISO0
Name
RXD1
RXD0
EXTAL, XTAL — Oscillator Pins
RESET — External Reset Pin
TXD1
TXD0
Pin
For devices assembled in 80-pin and 112-pin packages all non-bonded out
pins should be configured as outputs after reset in order to avoid current
drawn from floating inputs. Refer to
This section describes all pins which are availabe on the cover part
MC9S12XDP512 in 144-pin LQFP package. For modules and pinout
explanations of the different family members refer to
explanations:
Sets S12XA & S12XB - Family
Function 3
Name
Pin
Table 1-7. Signal Properties Summary (Sheet 4 of 4)
and
Function 4
E.5 Peripheral Sets S12XD - Family
Name
MC9S12XDP512 Data Sheet, Rev. 2.21
Pin
Function 5
Name
Pin
NOTE
NOTE
Table 1-7
Supply
Power
V
V
V
V
V
V
V
DDX
DDX
DDX
DDX
DDX
DDX
DDX
for affected pins.
PERS/
PERS/
PERS/
PERS/
PERS/
PERS/
PERT/
CTRL
PPSS
PPSS
PPSS
PPSS
PPSS
PPSS
PPST
Internal Pull
Resistor
Chapter 1 Device Overview MC9S12XD-Family
E.7 Pinout
and
Disabled Port T I/O, timer channels
Reset
State
E.6 Peripheral
Up
Up
Up
Up
Up
Up
Port S I/O, MOSI of SPI0
Port S I/O, MISO of SPI0
Port S I/O, TXD of SCI1
Port S I/O, RXD of SCI1
Port S I/O, TXD of SCI0
Port S I/O, RXD of SCI0
Description
55

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